3rd j basker vhdl

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CpE/CS 487: Digital System Design Fall 2009

Lecture 1Course organization and introduction

Prof. Haibo HeDepartment of Electrical and Computer Engineering

Stevens Institute of TechnologyHoboken, NJ 07086

2

Course organization

• Instructor: Prof. Haibo HeOffice: Burchard 412 Email: hhe@stevens.eduPhone: (201) 216-8057

• Course schedule:Tuesday & Thursday, 12:00 pm ~ 1:15pm

• Course web site:http://www.ece.stevens-tech.edu/~hhe/cpe487f09/class_index.htm

• Office hours:Thursday, 2: 00 pm ~ 4: 00 pm.Other hours by appointments.

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Grading and exam information

• Grading Information

-- Attendance (5%)-- Midterm examination (25%) -- Homework (20%) -- Laboratory Assignments (20%) -- Final examination (30%)

• Exam time:Midterm: TBAFinal: TBD

• All examinations are closed books and notes. However, students are allowed to have - one sheet for midterm/ two sheets for final - with formulas as a help during each exam.

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Textbook and references

Textbook:(1) VHDL - A Starter's Guide, Second Edition, Sudhakar Yalamanchili, Publisher: Prentice Hall, ISBN: 0-13-145735-7, 2005.

Recommended references (Not required): (1) A VHDL Primer, 3rd edition, J. Bhasker, Prentice Hall, ISBN 0-13-096575-8, 1999.

(2) Circuit Design with VHDL, Volnei A. Pedroni, MIT Press, ISBN: 0-262-16224-5, 2004.

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Laboratory

• Laboratory Work:

-- Team-work (maximum 3 students/team)

-- Finish the lab work on-time;

-- Write good lab reports;

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Course objectives and outlines

• Objectives:Please visit the course web site for detailed course objectives.http://www.ece.stevens-tech.edu/~hhe/cpe487f09/class_index.htm

• Outlines:VHDL language elements;Behavioral modeling;Dataflow modeling;Structural modeling;Computer-aided synthesis and implementation;Generics and configuration;Packages and libraries;Design of arithmetic logic unit (ALU);Finite state machines (FSM);Test bench design;

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History of VHDL

VHDL:Very High Speed Integrated Circuit (VHSIC) Hardware Description Language

• Launched in 1980 by Defense Advanced Research Projects Agency (DARPA)

• July 1983– Intermetrics, IBM and Texas Instruments were awarded a contract to

develop VHDL• August 1985

– Release of final version of the language under government contract, VHDL Version 7.2

• December 1987– IEEE Standard 1076-1987

• 1988– VHDL became an American National Standards Institute (ANSI )

standard• September 1993

– IEEE VHDL standard revised

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Digital System Design Flow

Requirements

Functional Design

Register TransferLevel Design

Logic Design

Circuit Design

Physical Design

Description for Manufacture

Behavioral Simulation

RTL SimulationValidation

Logic SimulationVerification

Timing SimulationCircuit Analysis

Design Rule Checking

Fault Simulation

• Design flows operate at multiple levels of abstraction

• Need a uniform description to translate between levels

• Increasing costs of design and fabrication necessitate greater reliance on automation via CAD tools– $5M - $100M to design new

chips– Increasing time to market

pressures

Source: Sudhakar Yalamanchili, Georgia Institute of Technology, 2006

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The Marketplace

Mar

ket r

iseM

arket f all

Maximum revenue

Revenue loss

Rev

enue

Time

Delay

Source: V. K. Madisetti and T. W. Egolf, “Virtual Prototyping of Embedded Microcontroller Based DSP Systems,” IEEE Micro, pp. 9–21, 1995.

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cellsmodules

chips

boards

algorithms

register transfersBoolean expressions

transfer functions

processorsregisters

gatestransistors

PHYSICAL

BEHAVIORAL STRUCTURAL

Source: (1) D. Gajski and R. H. Kuhn(2) Sudhakar Yalamanchili, VHDL- A starter’s guide

Role of HDL – Y chart

• Description and documentation• Simulation • Synthesis

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Introduction of development of digital IC technology

The following slides are adapted from “Digital Integrated Circuits - A Design Perspective,” 2003.J. M. Rabaey, A. Chandrakasan, B. Nikolic

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ENIAC - The first electronic computer (1946)

10 feet tall;1,000 square feet of floor- space; 30 tons;More than 70,000 resistors;

10,000 capacitors;6,000 switches;18,000 vacuum tubes;

Requires 150 kilowatts of power;

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Transistor Age

1951: Shockley develops junction transistor which can be manufactured in quantity.

1947: Bardeen and Brattain create point-contact transistor

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Early Integration

Jack Kilby, working at Texas Instruments, invented a monolithic “integrated circuit” in July 1959.

He had constructed the flip-flop shown in the patent drawing above.

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Planar transistors

In mid 1959, Noyce develops the first true IC using planar transistors,

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Practice Makes Perfect

1961: TI and Fairchild introduced first logic IC’s

1963: Densities and yields improve. This circuit has four flip-flops.

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Continues development

1967: Fairchild markets the first semi-custom chip. Transistors (organized in columns) can be easily rewired to create different circuits. Circuit has ~150 logic gates.

1968: Noyce and Moore leave Fairchild to form Intel. By 1971 Intel had 500 employees;

By 2004, 80,000 employees in 55 countries and $34.2B in sales.

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Continues development

1970: Intel starts selling a 1k bit RAM.

1971: Ted Hoff at Intel designed the first microprocessor. The 4004 had 4-bit busses and a clock rate of 108 KHz. It had 2300 transistors and was built in a 10 um process.

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Exponential Growth

1972: 8088 introduced.

Had 3,500 transistors supporting a byte-wide data path.

1974: Introduction of the 8080.

Had 6,000 transistors in a 6 um process.

The clock rate was 2 MHz.

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Today

Many disciplines have contributed to the current state-of-the-art in VLSI Design:

•Solid State Physics

•Materials Science

•Lithography and fab

•Device modeling

•Circuit design and layout

•Architecture design

•Algorithms

•CAD tools

To come up with chips like:

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Pentium 4 – 0.18 um t

0.18-micron process technology– Introduction date: November 20, 2000

(1.5, 1.4 GHz)– Level Two cache: 256 KB Advanced

Transfer Cache – System Bus Speed: 400 MHz– SSE2 SIMD Extensions– Transistors: 42 Million– Typical Use: Desktops and entry-level

workstations

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0.13-micron process technology (2.53, 2.2, 2 GHz)»Introduction date:

January 7, 2002»Level Two cache:

512 KB Advanced»Transistors: 55 Million

Pentium 4

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Pentium Pro - multichip module (MCM)

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• IBM chip has nine processor cores• 192 billion floating-point operations per second (192 G)• Typical Use: multimedia

Supercomputer for Sony's PlayStation 3

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Moore’s Law

In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.

He made a prediction that semiconductor technology will double its effectiveness every 18 months

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Moore’s Law

16151413121110

9876543210

1959

1960

1961

1962

1963

1964

1965

1966

1967

1968

1969

1970

1971

1972

1973

1974

1975

LOG

2 OF

THE

NU

MB

ER O

FC

OM

PON

ENTS

PER

INTE

GR

ATE

D F

UN

CTI

ON

Source: Electronics, April 19, 1965.

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Technology Directions: SIA Roadmap

Year 1999 2002 2005 2008 2011 2014Feature size (nm) 180 130 100 70 50 35Logic trans/cm 2 6.2M 18M 39M 84M 180M 390MCost/trans (mc) 1.735 .580 .255 .110 .049 .022#pads/chip 1867 2553 3492 4776 6532 8935Clock (MHz) 1250 2100 3500 6000 10000 16900Chip size (mm 2) 340 430 520 620 750 900Wiring levels 6-7 7 7-8 8-9 9 10Power supply (V) 1.8 1.5 1.2 0.9 0.6 0.5High-perf pow (W) 90 130 160 170 175 183

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Transistor Counts

1,000,000

100,000

10,000

1,000

10

100

11975 1980 1985 1990 1995 2000 2005 2010

808680286

i386i486

Pentium®Pentium® Pro

K 1 Billion 1 Billion TransistorsTransistors

Source: IntelSource: Intel

ProjectedProjected

Pentium® IIPentium® III

Courtesy, Intel

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Transistors shipped per year

Source: Dataquest/Intel, 8/02

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Moore’s law in Microprocessors

40048008

80808085 8086

286386

486Pentium® proc

P6

0.001

0.01

0.1

1

10

100

1000

1970 1980 1990 2000 2010Year

Tra

nsis

tors

(MT

)

2X growth in 1.96 years!

Transistors on Lead Microprocessors double every 2 yearsTransistors on Lead Microprocessors double every 2 years

Courtesy, Intel

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Frequency

Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years

P6Pentium ® proc

48638628680868085

8080800840040.1

1

10

100

1000

10000

1970 1980 1990 2000 2010Year

Freq

uenc

y (M

hz)

Doubles every 2 years

Courtesy, Intel

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Power will be a major problem

5KW 18KW

1.5KW 500W

40048008

80808085

8086286

386486

Pentium® proc

0.1

1

10

100

1000

10000

100000

1971 1974 1978 1985 1992 2000 2004 2008Year

Pow

er (W

atts

)

Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive

Courtesy, Intel

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Productivity Trends

1

10

100

1,000

10,000

100,000

1,000,000

10,000,000

2003

1981

1983

1985

1987

1989

1991

1993

1995

1997

1999

2001

2005

2007

2009

10

100

1,000

10,000

100,000

1,000,000

10,000,000

100,000,000Logic Tr./ChipTr./Staff Month.

xxxx

xx

x21%/Yr. compound

Productivity growth rate

x

58%/Yr. compoundedComplexity growth rate

10,000

1,000

100

10

1

0.1

0.01

0.001

Logi

c Tr

ansi

stor

per

Chi

p(M

)

0.01

0.1

1

10

100

1,000

10,000

100,000

Prod

uctiv

ity(K

) Tra

ns./S

taff

-Mo.

Source: Sematech

Complexity outpaces design productivity

Com

plex

ity

Courtesy, ITRS Roadmap

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Reference

The lectures notes and pictures are based on the following sources:

[1] J. Bhasker, A VHDL Primer,3rd edition, J. Bhasker, Prentice Hall, ISBN 0-13-096575-8, 1999

[2] S. Tewksbury, VHDL class noteshttp://stewks.ece.stevens-tech.edu/CpE487-S05/

[2] J. V. Spiegel, VHDL tutorial.http://www.seas.upenn.edu/~ese201/vhdl/vhdl_primer.html

[3] J. A. Starzyk, VHDL class lecture noteshttp://www.ent.ohiou.edu/~starzyk/network/Class/ee515/index.html

[4] S. Yalamanchili, Introductory VHDL: From Simulation to Synthesis, Prentice Hall, ISBN 0-13-080982-9, 2001.

[5] S. Yalamanchili, VHDL: A Starter's Guide,, Prentice Hall, ISBN: 0-13-145735-7, 2005.[6] V. A. Pedroni, Circuit Design with VHDL,, MIT Press, ISBN: 0-262-16224-5, 2004.[7] K. C. Chang, Digital Design and Modeling with VHDL and Synthesis, , IEEE Computer

Society Press, ISBN: 0-8186-7716-3, 1997[8] J. M. Rabaey, A. Chandrakasan, B. Nikolic, Digital integrated circuits- a design

perspective, 2nd edition, prentice hall.