1 programmer’s view of the eagle 2 16 -1 70 15 0 r0 r1 r7 register file ir pc cpu 0 1 2 ::::::...

1

Programmer’s View of the EAGLE

216-1

7 015 0

R0R1

R7

Register file

IR

PC

CPU

012

:::

Main memory

:

2

EAGLE : Notation

• [R3] means contents of register R3

• M[8] means contents of memory location 8

• A memory word at address 8 is defined as the 16 bits at address

9 and 8

3

EAGLE : Notation

• Special notation for 16-bit memory wordsM[8]<15…0> := M[9] © M[8]© is used to represent concatenation

M[8]M[9]

07

0

MS Byte

7815M[9] M[8]

LS Byte

One instruction0

1

Mem

ory

addr

esse

s

4

EAGLE: instruction formats

opcode

7 3

ra

0

Type Y

Type W opcode815

constant

0

15 11 10 8

constant

7 0

Type V opcode ra

7 6

ra

5 3

rb

2 0

Type X opcode ra rb

opcodeType Z07

2

5

Encoding for the GPRsto be used in place of ra or rb.

RegisterRegister CodeCode RegisterRegister CodeCode

R0 000 R4 100

R1 001 R5 101

R2 010 R6 110

R3 011 R7 111

6

Type Z

four instructions

halt (op-code=250)

nop (op-code = 249)

init (op-code = 251)

reset (op-code = 248)

opcode07

7

add (op-code = 11)

add r1 R[0] R[1] + R[0]

and (op-code = 19)

and r5 R[0] R[1] & R[0]

div (op-code = 16)

div r6 R[0] R[0] / R[6]

R[6] R[0] % R[6]

mul (op-code = 15)

mul r4 R[0] R[0] * R[4]

Type Y opcode

7 3

ra

0

8

not (op-code = 23)

not r6 R[6] !R[6]

or (op-code=21)

or r5 R[0] R[0] ~ R[5]

sub (op-code=12)

sub r7 R[0] R[0] – R[7]

opcode

7 3

ra

0

Type Y

9

Type X

mov (op-code = 0)

mov r5, r1 R[5] R[1]

useful for register transfers

7 6

ra

5 3

rb

2 0

Type x opcode ra rb

10

Type W

br (op-code = 252)

br 14 PC PC+14

Unconditional jump

opcode815

constant

0

11

Type V

addi (op-code = 13)

addi r4, 31 R[4] R[4] +31

andi (op-code = 20 )

andi r6, 1 R[6] R[6] &1

in (op-code=29)

in r1, 45 R[1] IO[45]

load (op-code=8)

load r3, 6 R[3] M[6]

15 11 10 8

constant

7 0

opcode ra

12

Type V

brn (op-code = 28)

brn r4, 3 if R[4] < 0, PC PC + 3

brnz (op-code = 25 )

brnz r6, 12 if R[6] != 0, PC PC + 12

brp (op-code=27)

brp r1, 45 if R[1] > 0, PC PC + 45

brz (op-code=8)

brz r5, 8 if R[5] = 0, PC PC + 8

15 11 10 8

constant

7 0

opcode ra

13

Type V

loadi (op-code=9)

loadi r5, 54 R[5] 54

ori (op-code=22)

ori r7, 11 R[7] 11 ~ R[7]

out (op-code=30)

out 32, r5 IO[32] R[5]

15 11 10 8

constant

7 0

opcode ra

14

Type V

shiftl (op-code=17)

shiftr( op-code=18)

store (op-code=10)

subi (op-code=14)

15 11 10 8

constant

7 0

opcode ra

15

Functional Groups of Instructions

Control Instruction Mnemonic opcode

Reset reset 11111000

No operation nop 11111001

Halt halt 11111010

Init init 11111011

16

Functional Groups of Instructions

Data Transfer Instruction

mnemonic opcode

Input in 11101

Output out 11110

Move mov 00

Load from memory load 01000

Load constant loadi 01001

Store into memory store 01010

17

Functional Groups of Instructions

Branch instruction

mnemonic opcode

Branch if negative brn 11100

Branch if not zero brnz 11001

Branch if zero brz 11010

Branch if positive brp 11011

Branch br 11111100

18

Functional Groups of Instructions

Arithmetic instruction

mnemonic opcode

Add add 01011

Add immediate addi 01101

Subtract sub 01100

Subtract immediate subi 01110

Divide div 10000

Multiply mul 01111

19

Functional Groups of Instructions

Logic Instruction mnemonic opcode

And and 10011

And immediate andi 10100

Or or 10101

Or immediate ori 10110

Not not 10111

Shift left shiftl 10001

Shift right shiftr 10010

20

Modified EAGLE

• One 16-bit accumulator: ACC• 8 GPRs: R0, R1, …, R7; 16-bits each• Two 16-bit system registers transparent to

the programmer: PC, IR• Memory word size: 16 bits• Memory space size: 216 bytes• Memory organization: 216 x 8 bits• Memory accessed in 16 bit words

( i.e., 2 byte chunks)• Little-endian byte storage

21

Modified EAGLE Instruction Formats

Type W15 11 10 8

constant

7 0

opcode unused

Type Y

Type Z

15 11 10 8

constant

7 0

Type X opcode ra

opcode unused

0237

opcode ra

0237