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  • Allwinner H3 Datasheet

    Quad-Core OTT Box Processor

    Version 1.2

    Apr.23,2015

    Copyright© 2015 Allwinner Technology Co.,Ltd. All Rights Reserved.

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    H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 2

    Declaration

    This documentation is the original work and copyrighted property of Allwinner Technology (“Allwinner”). Reproduction

    in whole or in part must obtain the written approval of Allwinner and give clear acknowledgement to the copyright

    owner.

    The information furnished by Allwinner is believed to be accurate and reliable. Allwinner reserves the right to make

    changes in circuit design and/or specifications at any time without notice. Allwinner does not assume any responsibility

    and liability for its use. Nor for any infringements of patents or other rights of the third parties which may result from

    its use. No license is granted by implication or otherwise under any patent or patent rights of Allwinner. This

    documentation neither states nor implies warranty of any kind, including fitness for any particular application.

    Third party licences may be required to implement the solution/product. Customers shall be solely responsible to

    obtain all appropriately required third party licences. Allwinner shall not be liable for any licence fee or royalty due in

    respect of any required third party licence. Allwinner shall have no warranty, indemnity or other obligations with

    respect to matters covered under any required third party licence.

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    H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 3

    Revision History

    Version Date Description

    V1.0 Nov.18,2014 Initial release version

    V1.1 Jan.26,2015 Correct PWM Description

    V1.2 Apr.23,2015 Add the programming guide of crypto engine

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    H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 4

    Table of Contents

    Declaration ............................................................................................................................................................................ 2

    Revision History..................................................................................................................................................................... 3

    Table of Contents .................................................................................................................................................................. 4

    Chapter 1 About This Documentation ......................................................................................................................... 51

    1.1. Documentation Overview ........................................................................................................................... 51

    1.2. Acronyms and abbreviations ....................................................................................................................... 51

    Chapter 2 Overview ..................................................................................................................................................... 55

    2.1. Processor Features ...................................................................................................................................... 56

    2.1.1. CPU Architecture ................................................................................................................................. 56

    2.1.2. GPU Architecture ................................................................................................................................. 56

    2.1.3. Memory Subsystem ............................................................................................................................. 56

    2.1.3.1. Boot ROM .................................................................................................................................... 56

    2.1.3.2. SDRAM ........................................................................................................................................ 56

    2.1.3.3. NAND Flash ................................................................................................................................. 57

    2.1.3.4. SD/MMC ...................................................................................................................................... 57

    2.1.4. System Peripheral ................................................................................................................................ 57

    2.1.4.1. Timer ........................................................................................................................................... 57

    2.1.4.2. High Speed Timer ........................................................................................................................ 58

    2.1.4.3. RTC .............................................................................................................................................. 58

    2.1.4.4. GIC ............................................................................................................................................... 58

    2.1.4.5. DMA ............................................................................................................................................ 58

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    H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 5

    2.1.4.6. CCU .............................................................................................................................................. 58

    2.1.4.7. PWM ........................................................................................................................................... 58

    2.1.4.8. Crypto Engine(CE) ....................................................................................................................... 59

    2.1.4.9. Security ID ................................................................................................................................... 59

    2.1.4.10. CPU Configuration ..................................................................................................................... 59

    2.1.4.11. Power Management ................................................................................................................. 59

    2.1.5. Display Subsystem ............................................................................................................................... 59

    2.1.5.1. DE2.0 ........................................................................................................................................... 59

    2.1.5.2. Display Output ............................................................................................................................ 60

    2.1.6. Video Engine ....................................................................................................................................... 60

    2.1.6.1. Video Decoding ........................................................................................................................... 60

    2.1.6.2. Video Encoding ........................................................................................................................... 60

    2.1.7. Image Subsystem ................................................................................................................................. 61

    2.1.7.1. CSI................................................................................................................................................ 61

    2.1.8. Audio Subsystem ................................................................................................................................. 61

    2.1.8.1. Audio Codec ................................................................................................................................ 61

    2.1.8.2. One Wire Audio(OWA) ................................................................................................................ 61

    2.1.8.3. I2S/PCM....................................................................................................................................... 61

    2.1.9. External Peripherals ............................................................................................................................ 62

    2.1.9.1. USB .............................................................................................................................................. 62

    2.1.9.2. Ethernet ...................................................................................................................................... 62

    2.1.9.3. ADC .............................................................................................................................................. 62

    2.1.9.4. CIR .......................................................................................................................................

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