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Exam

Name___________________________________

MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.

1) Two kinds of data selectors are ________ and ________. 1)A) comparators, registers B) encoders, decodersC) adders, subtractors D) multiplexers, demultiplexers

Answer: DDiff: 0 Type: MC

TRUE/FALSE. Write 'T' if the statement is true and 'F' if the statement is false.

2) A waveform that repeats itself at fixed intervals is called a periodic waveform. 2)Answer: True FalseDiff: 0 Type: TF

3) Parallel data is sent along a single conductor, one bit at a time. 3)Answer: True FalseDiff: 0 Type: TF


4) Which one of the following is not a surface-mount IC package? 4)A) SOIC B) DIP C) FP D) PLCC

Answer: BDiff: 0 Type: MC

5) The arrow in the figure below points to pin number ________. 5)

A) 13 B) 4 C) 12 D) 5Answer: DDiff: 0 Type: MC

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Figure 1-1

6) Which edge in Figure 1-1 is the trailing edge? 6)A) 1 B) 2 C) 3 D) Both 1 and 3

Answer: CDiff: 0 Type: MC

7) The output from an AND gate is LOW ________. 7)A) when at least one input is LOW B) only when all inputs are LOWC) only when all inputs are HIGH D) none of the above

Answer: ADiff: 0 Type: MC

Figure 1-3

8) The symbol in Figure 1-3(A) represents the ________ function. 8)A) AND B) NOT C) OR D) AND/OR



9) When the inputs to a 2-input AND gate are both HIGH, the output is HIGH. 9)Answer: True FalseDiff: 0 Type: TF

10) A demultiplexer is sometimes called a mux. 10)Answer: True FalseDiff: 0 Type: TF

11) The DIP package style has two parallel rows of through-hole pins. 11)Answer: True FalseDiff: 0 Type: TF


12) Which one of the circuits listed is made up of flip-flops? 12)A) A converter B) A multiplexer C) A comparator D) A register


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13) The transition times for an ideal digital pulse are ________. 13)A) measured between 0 and 90% of the amplitudeB) measured between 10% to 90% of the amplitudeC) zeroD) infinite


14) Which IC package style has no leads? 14)A) LCCC B) SOICC) PLCC D) All must have leads.



15) When the input to a logic inverter is HIGH, the output is LOW. 15)Answer: True FalseDiff: 0 Type: TF

16) When both inputs to a 2-input OR gate are both LOW, the output is LOW. 16)Answer: True FalseDiff: 0 Type: TF


17) On a positive-logic pulse, the trailing edge is the ________. 17)A) LOW-to-HIGH transition B) rising edgeC) falling edge D) positive-going edge


18) Which circuit converts coded information into a noncoded form? 18)A) Comparator B) Encoder C) Decoder D) Multiplexer


19) On a negative-going pulse, the leading edge is the ________. 19)A) rising edge B) negative-going edgeC) LOW-to-HIGH transition D) positive-going edge


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Figure 1-1

20) Which edge in Figure 1-1 is the leading edge? 20)A) 1 B) 2 C) 3 D) Both 1 and 3


21) On a positive-going pulse, the leading edge is the ________. 21)A) positive-going edge B) HIGH-to-LOW transitionC) falling edge D) negative-going edge



22) The values of an analog signal flow smoothly from one to the next. 22)Answer: True FalseDiff: 0 Type: TF


Figure 1-3

23) The symbol in Figure 1-3(B) represents the ________ function. 23)A) AND B) XOR C) OR D) NON


24) On a digital waveform, the transition time from a LOW level to a HIGH level is called ________. 24)A) rise time B) period C) pulse width D) fall time


Figure 1-1

25) The time between transition 1 and transition 3 in Figure 1-1 is the ________. 25)A) frequency B) amplitude C) period D) pulse width


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26) A multiplexer converts parallel data to serial data. 26)Answer: True FalseDiff: 0 Type: TF


27) A circuit that converts an digital signal to an analog waveform is commonly called a(n) ________. 27)A) ADC B) CAD C) DAC D) PLD


Figure 1-4

28) The package style in Figure 1-4(A) is a(n) ________. 28)A) SOIC B) PLCC C) LCCC D) FP


29) The package style in Figure 1-4(C) is a(n) ________. 29)A) SOIC B) PLCC C) LCCC D) FP


30) Which circuit converts data from serial form to parallel form? 30)A) Demultiplexer B) Multiplexer C) Encoder D) Comparator


31) The final step in the PLD programming process is ________. 31)A) design entry B) compilation C) synthesis D) download


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Figure 1-2

32) Item (4) of the nonideal pulse in Figure 1-2 represents the waveform ________. 32)A) amplitude B) rise time C) fall time D) pulse width


33) Which of the following is an example of a mechatronics system? 33)A) A laptop computer B) An industrial robotC) A surgical laser D) None of the above



34) Digital systems respond to voltage levels that change abruptly between two levels (high and low). 34)Answer: True FalseDiff: 0 Type: TF

35) A sinusoidal waveform is an analog signal. 35)Answer: True FalseDiff: 0 Type: TF

36) Serial data is sent along a single conductor, one bit at a time. 36)Answer: True FalseDiff: 0 Type: TF

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Figure 1-2



38) A periodic digital waveform ________. 38)A) has both a HIGH and LOW levels B) repeats itself at a fixed intervalC) has a duty cycle D) all of the above


39) The first step in the PLD programming process is ________. 39)A) design entry B) compilation C) synthesis D) download


Figure 1-4

40) The package style in Figure 1-4(B) is a(n) ________. 40)A) SOIC B) PLCC C) LCCC D) FP


41) The output from an OR gate is HIGH ________. 41)A) only when all inputs are LOW B) only when all inputs are HIGHC) when at least one input is HIGH D) none of the above


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42) The FPGA is a fixed-function device. 42)Answer: True FalseDiff: 0 Type: TF


43) On a digital waveform, the transition time from a HIGH level to a LOW level is called ________. 43)A) period B) pulse width C) rise time D) fall time


Figure 1-2

44) Item (1) of the nonideal pulse in Figure 1-2 represents the waveform ________. 44)A) period B) amplitude C) pulse width D) transition time


45) What is the duty cycle of a digital waveform with a pulse width of 10 ms a period of 90 ms? 45)A) 90% B) 10% C) 11.1% D) 9%



46) Encoders and decoders perform opposite conversions. 46)Answer: True FalseDiff: 0 Type: TF

47) Digital data can be processed and transmitted more efficiently and reliably than analoginformation.

47)

Answer: True FalseDiff: 0 Type: TF

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48) The time from one leading edge on a digital waveform to the next is the waveform ________. 48)A) period B) rise time C) pulse width D) fall time



49) The field that comprises both mechanical and electronic components is known aselectro-mechanics.

49)



Figure 1-3

50) The symbol in Figure 1-3(C) represents the ________ function. 50)A) OR B) AND C) XOR D) NOT


51) Which circuit converts information into a specific coded form? 51)A) Comparator B) Encoder C) Decoder D) Multiplexer


52) The output from an AND gate is HIGH when ________. 52)A) one input is LOW and the remaining inputs are HIGHB) one input is HIGH and the remaining inputs are LOWC) all inputs are HIGHD) all inputs are LOW


53) The output from an OR gate is LOW ________. 53)A) whenever any input is HIGH B) only when all inputs are HIGHC) only when all inputs are LOW D) none of the above


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54) An oscilloscope display indicates that the period of a digital waveform is 40 µs. What is frequencyof this waveform?

54)

A) 25 kHzB) 2.5 kHzC) 40 MHzD) The frequency cannot be determined using the information provided.



55) The binary number system uses just two symbols. 55)Answer: True FalseDiff: 0 Type: TF

56) A flip-flop is a 1-bit storage device. 56)Answer: True FalseDiff: 0 Type: TF


57) On a negative-logic pulse, the trailing edge is the ________. 57)A) falling edge B) negative-going edgeC) HIGH-to-LOW transition D) positive-going edge



58) The PLCC package has J-type leads on all four edges. 58)Answer: True FalseDiff: 0 Type: TF


59) Which one of the following is not a binary arithmetic function? 59)A) Multiplexing B) Division C) Subtraction D) Addition


60) Which circuit creates an output that indicates whether or not the input values are equal? 60)A) Comparator B) Encoder C) Decoder D) Multiplexer



61) When either input to a 2-input OR gate is HIGH, the output is HIGH. 61)Answer: True FalseDiff: 0 Type: TF

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62) On a negative-going pulse, ________. 62)A) HIGH = 0 and LOW = -1 B) HIGH = 0 and LOW = 1C) LOW = -1 and HIGH = 1 D) HIGH = 1 and LOW = 0



63) The clock signal synchronizes the other waveforms in a circuit. 63)Answer: True FalseDiff: 0 Type: TF


64) When data is set along a single conductor, it is referred to as ________. 64)A) parallel data B) simultaneous dataC) serial data D) none of these


65) The netlist is generated during the ________ phase of the PLD programming process. 65)A) design entry B) compilation C) synthesis D) download



66) The decimal number system uses nine different symbols. 66)Answer: True FalseDiff: 0 Type: TF

67) The flat-pack (FP) IC package style is a surface-mount device. 67)Answer: True FalseDiff: 0 Type: TF


68) The arrow in the figure below points to pin ________. 68)

A) 4 B) 5 C) 17 D) 16Answer: CDiff: 0 Type: MC

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69) Clock signals carry pieces of information such as letters and numbers. 69)Answer: True FalseDiff: 0 Type: TF


70) The approximate duty cycle for the digital waveform below is ________. 70)

A) 30% B) 80% C) 20% D) 50%Answer: CDiff: 0 Type: MC


71) When either input to a 2-input AND gate is LOW, the output is LOW. 71)Answer: True FalseDiff: 0 Type: TF


72) Of the circuits listed, the one that is most likely to be found in a CD player is a(n) ________. 72)A) programmable logic device B) SPLDC) digital-to-analog converter D) analog-to-digital converter



73) The amplitude of a digital waveform is the difference in voltage between the LOW and HIGHlevels.

73)


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Figure 1-2



75) A circuit that converts an analog waveform to a digital signal is commonly called a(n) ________. 75)A) ADC B) CAD C) PLD D) DAC


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Answer KeyTestname: CH1

1) D2) TRUE3) FALSE4) B5) D6) C7) A8) A9) TRUE

10) FALSE11) TRUE12) D13) C14) A15) TRUE16) TRUE17) C18) C19) B20) A21) A22) TRUE23) C24) A25) D26) TRUE27) C28) A29) C30) A31) D32) C33) B34) TRUE35) TRUE36) TRUE37) D38) D39) A40) B41) C42) FALSE43) D44) B45) C46) TRUE47) TRUE48) A49) FALSE50) D

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Answer KeyTestname: CH1

51) B52) C53) C54) A55) TRUE56) TRUE57) D58) TRUE59) A60) A61) TRUE62) B63) TRUE64) C65) C66) FALSE67) TRUE68) C69) FALSE70) C71) TRUE72) C73) TRUE74) B75) A

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