8087 coprocessor

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8087 MATH COPROCESSOR:

Overview:

Many microcomputer programs, such as those used for scientific research, engineering, business, and

graphics, need to make mathematical calculations such as computing the square root of a number, the

tangent of a number, or the log of a number.

Another common need is to do arithmetic operations on very large and very small numbers. There areseveral ways to do all this.

One way is to write number-crunching part of the program in a high-level language such as FORTRAN

compile this part of the code, and link in I/O modules written in assembly language. The difficulty with

this approach is that programs written in high level languages tend to run considerably slower than the

programs written in assembly language.

Second way is to write an assembly language program which uses the normal instruction set of the

processor to do the arithmetic functions. Reference books which contain the algorithms for these are

readily available. But it is often time consuming to get from the algorithm to a working assembly

language program.

Third way is to buy a library of floating point arithmetic object modules from the manufacturer of the

microprocessor we working with or from an independent software house. Then in program, just declare

a procedure needed from the library as external, call the procedure as required, and link the library

object code files for the procedure to the object code for the program. This spare the labor of writing all

the procedure.

In an application we need a calculation to be done as quickly as possible, however all previous

approaches have problems.

The architecture and instruction set of the general purpose microprocessor such as 8086 are not

designed to do complex mathematical operations efficiently. Therefore , even highly optimized number

crunching programs run slowly on the general purpose machines.

To solve this problem, special processors with architectures and instruction sets optimized for number-

crunching is developed. Eg: Intel 8087 math processor.

THE 8087 NUMERIC DATA PROCESSOR:

It is specially designed to perform arithmetic operations efficiently, used in parallel with the main

processor in a system rather than serving as a main processor itself. Therefore it is called as a

coprocessor.

The major principle here is the main processor such as 8086 handles the general program execution and

the 8087 coprocessor handles specialized math computations. An 8087 instructions may perform given

mathematical computation 100 times faster than the equivalent sequence of 8086 instructions.

The 8087 is an actual processor with its own specialized instruction set. It can operate on data of the

integer, decimal, and real types with lengths ranging from 2 to 10 bytes.

The instruction set not only includes various forms of addition, subtraction, multiplication, and division,

but also provides many useful functions, such as taking the square root, exponentiation, taking the

tangent and so on.

Eg: the 8087 can multiply two 64-bit real numbers in about 27 us (for 8086, 2 ms) and calculate a square

root in about 36 us (for 8086, 20ms).


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The 8087 provides simple and effective way to enhance the performance of an 8086/8088 based system

particularly when an application is primarily computational in nature.

The NDP cannot fetch its own instructions and therefore must operate with either an 8086/8088, which

acts as the host in a coprocessor configuration. The interfacing between the host and the NDP simply

requires connections between the corresponding pins of the two processors.

Instructions of 8087 are written in a program as needed with the 8086/8088. When the program is

assembled, the opcodes for 8087 instructions are put in memory right along with the codes for

8086/8088 instructions.

As the 8086/8088 fetches instruction bytes from memory and puts them in its queue, the 8087 also reads

these instruction bytes and puts them in its internal queue. The 8087 decodes each instruction that comes

into its queue.

When 8087 decodes an instruction from its queue and finds that it is an 8086 instruction, the 8087

simply treats the instruction as an NOP. Similarly when an 8086/8088 decodes an instruction from its

queue and finds that it is an 8087 instruction, the 8086 treats the instruction as NOP or in some cases

reads a data word from memory for the 8087.

Each processor decodes all the instructions in the fetched instruction byte stream but executes only its

own instruction. How do the two processors recognize the 8087 instruction is, all the 8087 instruction

codes have 11011 as the most significant bits of their first code byte.

8087 Data Types:

The 8087 can operate on memory operands of seven different data types: word integer, short integer,

long integer, packed BCD, short real, long real, temporary real. In memory, the least significant byte of

a number is always stored in the lowest address.

The number of bytes, format, and approximate range for each of these data types are shown below.

Data Types: Bytes:Approximate

Range (decimal):

Format:

Word Integer 2-32,768 to

32,767

S Magnitude

15 0

Short Integer 4-2 x 10

9to

2 x 109

S Magnitude

32 0

Long Integer 8-9 x 10

18to

9 x 1018

S Magnitude

63 0

Packed BCD 10-10

18+ 1 to

1018

-1

S 0 D17 D16 D1 D0

79 78 72 71 0

Short Real 41 x 10

-38to

3 x 1038

S E F

31 30 23 22 0

Long Real 8 10-308

to 10308

S E F

63 62 52 51 0

TemporaryReal

1010

-4932to

104932

S E F

79 78 64 63 0


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SIGNED (BINARY) INTEGERS:

The 8087 allows integer operands to be represented using 16 bits word integer with the range: -2

15 to

+215

-1, 32 bits short integer with the range: -231

to +231

-1, 64 bits long integer with the range: -263

to

+263

-1.

The most significant bit is a sign bit which is 0 for positive numbers and 1 for negative numbers. The

other 15 to 63 bits represent the magnitude of the numbers.

If the number is negative, the magnitude of the number is represented in 2s complement form.

PACKED DECIMAL (BCD) NUMBERS:

In this format, a decimal number is stored in 10 bytes. The entire most significant byte is dedicated to

the sign. The most significant bit (S) of this byte indicates whether the decimal number is positive or

negative.

The remaining 9 bytes represents the magnitude with two BCD digits packed into each byte. The valid

range of the values is: -1018

+1 to 1018

1.

REAL (FLOATING-POINT) NUMBERS:

The floating point numbers are often called real numbers because they hold signed integers, fractions

and mixed numbers, can represent operands which may vary from extremely small to extremely large

values and retain a constant number of significant digits during calculations.

A floating point number has three parts: sign bit, biased exponent, significand (mantissa).

X= 2exp

x mantissa

The exponent adjusts the position of the binary point in the mantissa. Decreasing the exponent by 1

moves the binary point to the right by one position. So a very small number can be represented by using

the negative exponent without losing any precision. Except for numbers whose mantissa parts fall within

the range of the format, a number may not be exactly re-presentable, thus causing a round-off errors.

If leading 0s are allowed, a given number may have more than one representation in the real numberformat. But since there are a fixed number of bits in the mantissa, leading 0s increase the round-off

error.

So in order to minimize the round-off errors, after each calculation 8087 deletes the leading 0s by

properly adjusting the exponent. A nonzero real number is said to be normalized when its mantissa is in

the form of 1.F, where F represents a fraction.

Normally a bias value is added to the true exponent, so that the true exponent = the number in the

exponent field bias value. Using biased exponents two normalized real numbers of the same sign can

be compared by simply comparing the bytes from left to right as if they were integers.

The Intel family of arithmetic coprocessor supports three types of floating point numbers: single/single-

precision/short real (32 bits), double/ double-precision/long real (64 bits), and temporary-real/extended

precision (80 bits).

Short real:

In short real data format, the biased exponent (E) is 8 bits and the fraction (F) is 23 bits. The number is

represented by the form:

(-1)S* 2

E-127* 1.F where S: sign bit,

The offset added to each exponent is 127 or 7Fh, the most significant bit is sign bit.


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Because 1 is always present before the fraction, it implied and is not physically stored.

0 1 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 =41360

Sign Biased Exponent Fraction

The true exponent= 130-127 = 3

Floating point number = +1.011011 x 23= 1011.011 = 11.375d

Steps to convert floating point number to decimal number is:

1. Separate sign bit, biased exponent, and significand.

2.

Convert the biased exponent into a true exponent by subtracting the bias.

3.

Write the number as a normalized binary number.

4. Convert it to a de-normalized binary number.

5. Convert the de-normalized binary number to decimal number.

Steps to convert decimal number to floating point number is:

1.

Convert the decimal number to binary.

2.

Normalize the binary number.

3.

Calculate the biased exponent.

4. Store the number in the floating-point format.

Eg: 20.59375d = 10100.10011 = 1.010010011 x 24

S = 0, E = 127 + 4 = 131 = 10000011, F = 010010011

Short real format: 0 10000011 01001001100000000000000 = 41A4C000h

For short real data type, the valid range of the biased exponent is 0 < E < 255, then the numbers can berepresented are from 2

-126to 2

128, approximately 1 x 10

-38to 3 x 10

38.

A biased exponent of all 1s is reserved to represent infinity or not a number (NAN), a biased

exponent of all 0s is used to represent +0 (all 0s with a + sign), -0 (all 0s with - sign) or a denormal.

A denormal is a result that causes an underflow and has leading 0s in the mantissa even after exponent

is adjusted to its smallest possible value.

NANs and denormal are normally used to represent overflows and underflows respectively, although

they may be used for other purposes.

Long real:

The long real format has 11 exponent bits and 52 mantissa bits. Again the first nonzero bit in the

mantissa is implied and not stored. The range of representable nonzero quantities is approximately

10-308

to 10308

.

The offset added to each exponent is 1023 or 3FFh, the most significant bit is sign bit. This format is

often called as double precision representation, it is basically same as short real format except that it

allows greater range and accuracy.


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Temporary real:

The 8087 internally stores all numbers in temporary real format which uses 15 bits for the exponent and

64 bits for mantissa. The offset added to each exponent is 3FFFh, the most significant bit is sign bit.

Unlike in short real and long real formats, the most significant bit in the mantissa is actually stored.

Because of the extended precision (19 to 20 decimal digits), integer and packed BCD operands can be

operated on internally using floating point arithmetic and still yield exact results.

A primary reason for using the temporary real format for internal data storage is to reduce the chancesfor overflows and underflows during a series of calculations which produces a final result that is within

the required range.

Eg: D = (A*B)/C where A, B, C, and D are in the short real format. The multiplication may yield a

result which is too large to be represented in the short real format, but the final result after the division

by C, may be still within the valid range.

The 15 bit exponent of the temporary real format extends the range of valid to approximately 104932

so for most applications the user need not to worry about overflows and underflows in the intermediate

calculations.

Storing Floating Point Data in Memory:

Floating point numbers are stored with the assembler using DD directive for single precision, DQ for

double precision, and DT for extended temporary precision.

The Microsoft macro assembler contains an error that doesnt allow a plus sign to be used with positive

floating-point numbers. A +92.45 must be defined as 92.45 for the assembler to function correctly.

This error has been corrected in version 6.11 of MASM if the REAL4, REAL8, or REAL10 directives

are used in place of DD, DQ, and DT to specify floating point data.

Examples:

0000 C377999A DATA7 DD -247.6 ;single-precision0004 C0000000 DATA8 DD 2.0 ;single-precision

0008 486F4200 DATA9 REAL4 -247.6 ;single-precision

000C 4059100000000000 DATAA DQ 100.25 ;double-precision

0014 3F543BF727136A40 DATAB REAL8 0.001235 ;double-precision

001C 400487F34D6A161E4F76 DATAB REAL10 33.9876 ;double-precision

8087 ARCHITECTURE:

The monitor and control logic maintains a 6-bye instruction queue (only 4-bytes are used if operated in

conjunction with the 8088) and tracks the instruction execution sequence of the host. If the instruction currently being executed by the host is an ESC instruction, the 8087 decodes the

external opcode to perform the specified operation, and also captures the operand and operand address.

The instruction other than ESC instruction is simply ignored by the 8087. The 8087 works internally

with all numbers in the 80-bit temporary real format. To hold numbers being worked, the 8087 has a

register stack of eight 80-bit data registers labeled (0) to (7).

These registers are used as a last-in-first stack. The 8087 has 3 bit stack pointer to holds the number of

register that is the current top-of-stack (TOS).


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5V

Vcc

8 - Register stack, each register has 80 bits

79 0

CLK

INT

Bus tracking and

control logic,

including aninstruction queue

AD15 -AD0

Floating point

arithmetic moduleA19/S6-

A16/S3 15

B C3 ST C2 C1 C0 IR X P U O

BHE/S7Status Register

S 2 - S 0 X X X IC RC PC IEM X PM UM OM

Control Register

QS1 - QS0

R Q/G T0 16 LSB's of instruction addressR Q/G T1 4 LSBs of

instruction

addressBUSY

0 11 LSBs of op code

READY16 LSB's of operand address

4 LSBs ofoperand

addressRESET0


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When it is initialized, the 3 bit stack pointer (the ST bits which are bits 13, 12, and 11 of the status

register) is loaded with 000, so register 0 is then the TOS. When it reads first number that it is going to

work on from memory, it converts it to 80 bit temporary real format if necessary. Then it decrements the

stack pointer to 111 and writes the temporary real representation of the number in register number

111(7).

An operand may be popped from this stack or pushed onto it. A push operation first decrements ST by 1

and then loads the operand into the new top of the stack element, and a pop operation retrieves the top of

the stack and then increments ST by 1.

The stack as being wrapped around in a circle so that if we decrement 000 we get 111, and also if we

push more than 8 numbers on the stack, they wrap around and write over previous numbers.

In the 8087 instructions the register that is currently the TOS is referred to as ST(0), or simply ST. The

register just below this in the stack is referred to as ST(1).

Eg: if ST contains a 3, then ST(0) points to register 3 and ST(2) represents register 5, ST(6) represents

register 1.

Register

Number:

000 Register 0 ST(5)001 Register 1 ST(6)

010 Register 2 ST(7)






STATUS REGISTER:

It is 16 bits wide reflects the overall operation of the coprocessor. It reports various errors, stores the

condition code for certain instructions, specifies which register is the TOS, and indicates busy status.

The status register is accessed by executing the instruction FSTSW, which copies the content of status

into a word of memory. The instruction FSTSW AX copies status register directly into the

microprocessors AX register.

The format of the status register is given below.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

B C3 ST C2 C1 C0 ES X PE UE OE ZE DE IE

B: The busy bit indicates that the coprocessor is busy in executing a task. The busy is tested by

examining the status register or by using the FWAIT instruction. Newer coprocessors automatically

synchronize with the microprocessor, so the busy flag need not be tested before performing additional

coprocessor tasks.

C0 C3: The condition code bits indicate conditions about the coprocessor. These bits have different

meanings for different instructions. These bits are set by compare and examine instructions.


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ST: The top-of-stack bit indicates the current register addressed as top of the stack (ST). This is

normally ST(0).

ES:The error summary bit is set if any unmasked error bit (PE, UE, OE, ZE, DE, or IE) is set. In 8087

error summary also caused a coprocessor interrupt.

X:Reserved

PE:The precision error indicates that the result or operands exceeds the selected precision.

UE: An underflow error indicates a nonzero result that is too small to represent with the current

precision selected by the control word.

OE:An overflow error indicates a result that is too large to be represented. If this error is masked, the

coprocessor generates infinity for an overflow error.

ZE: A zero error indicates the divisor was zero while dividend is noninfinity or nonzero number.

DE:A denormalized error indicates that at least one of the operands is denormalized.

IE: An invalid error indicates a stack overflow or underflow, indeterminate form (00, +infinity, -

infinity) or the use of a NAN as an operand. This flag indicates errors such as those produced by taking

the square root of a negative number, and so on.

After the 8087 is reset or initialized, all status bits except the condition code are cleared. There are two

ways to test the bits of the status register once they are moved to AX register with the FSTSW AX

instruction.

1.

Use the TEST instruction to test the individual bits of the status register.

2.

Use the SAHF instruction to transfer the leftmost 8 bits of the status register into the

microprocessors flag register.

CONTROL REGISTER:

The format of the control register is given below.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

X X X IC RC PC IEM X PM UM OM ZM DM IM

The 8087 recognizes six error types, each type may be individually masked from causing an interrupt by

setting the corresponding mask bits to 1 in the control register.

It also selects precision, rounding control, and infinity control. The FLDCW instruction is used to load a

value into the control register.

The mask bits are denoted IM (invalid operation), DM (denormalized operand), ZM (divide by zero)

OM (overflow), UM (underflow), and PM (precision error).

If masked, the error will not cause an interrupt but 8087 will perform a standard response and proceed

with next instruction in sequence.

In particular for precision error the standard response is to return the rounded result. It should be

masked for floating point arithmetic because for most applications precision error will occur most of the

time. Precision error are of consequence only in special situations.


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An interrupt request, including error-related requests also depends on the interrupt enable mask bit

(IEM) in the control register.

When this bit is set to 1, all interrupts are disabled except when the CPU is executing a WAIT

instruction. If IEM is 0, an unmasked error can cause an interrupt to be sent to the CPU so that the error

can be handled by an error-handling-interrupt routine.

In the error-handling routine, the current instruction pointer and operand pointer, which are stored in

8087, can be examined by the 8086/8088 by first putting them into memory. This can be handled by

using the appropriate 8087 instruction.

The contents of these pointers identify the instruction and operand addresses when the error occurred

And only 11 bits of the instruction code are kept in the instruction pointer register because the most

significant 5 bits are always 11011, the op-code of an ESC instruction.

The remaining bits provide flexibility in controlling precision (PC), rounding (RC), and infinity

representations (IC). They are defined as follows.

PC bits: 00 Means 24-bit precision

01 Is reserved

10 Means 53-bit precision

11 Means 64-bit precisionPC bits: 00 Means round to nearest

01 Means round towards infinity

10 Means round towards +infinity

11 Means truncation

PC bits: 0 Indicates that +infinity and infinity are treated as a single unsigned infinitive.

1 Indicates that +infinity and infinity are treated as two signed infinitives.

During reset or initialization of the 8087, it sets PC bits to 11, RC bits to 00, IC bit to 0, IEM bit to 0

and all error mask bits to 1.

TAG REGISTER:

It holds the status of the contents of the data registers. Each data register is associated with two tag bits,

which indicate whether its contents are valid (00), zero (01), a special value ie NAN, infinity, or

demormal (10), or empty (11).

INSTRUCTION SET:

The 8087 has 68 instructions, which can be divided into six groups according to their functions. They

are: data transfer, arithmetic, comparison, transcendental, constant, and processor control groups.

The 8087 and host CPU share the same instruction stream, the ASM-86 assembler allows the user towrite programs in a super set instruction set which consists of the 8086s and 8087s instructions.

For each 8087 instruction, the assembler generates two machine instructions, a WAIT instruction

followed by an ESC instruction whose external indicates the 8087s instruction.

Eg: FST SHORT_REAL

Assume that SHORT_REAL is defined using DD directive. This instruction converts the contents of the

top of the ST stack to short real format and stores the result into SHORT_REAL, will be assembled as.


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Op code for WAIT Direct addressing mode

1 0 0 1 1 0 1 1

1 1 0 1 1 0 0 1 0 0 0 1 0 1 1 0 Low-order disp High - order disp

Op code for

ESC

MOD R/M (Optional, depending

on the displacement)External op code for performing the load

short real to memory operand

The WAIT instruction preceding the ESC instruction causes the 8086/8088 to enter a wait state until its

TEST pin becomes active, and is necessary to prevent the ESC instruction from being decoded before

the 8087 completes its current operation.

If the TEST pin is already active or when it becomes active, the ESC instruction will be decoded by the

8087 and both the 8086 and 8087 will proceed in parallel.

An WAIT instruction must be explicitly included whenever the CPU wants to access a memory operand

involved in the previous 8087s instruction.

Eg: In the following sequence the CPU must wait until the 8087 has returned its result to

SHORT_REAL before it can execute the CMP instruction

FST SHORT_REAL

8086s instructions which do not

use SHORT_REAL

WAIT

CMP BYTE PTR SHORT_REAL+3, 0

JG POSITIVE REAL

..

..

All the 8087 mnemonics start with an F, which stand for floating point, the form in which the 8087

works with numbers internally and distinguishes the 8087 instructions from 8086 instructions.

Many of the assembler instructions allow the user to specify operands in more than one way, either

explicitly or implicitly.

Eg: FADD //source/destination, source represents that the instruction can be written in three different

ways.

1. Both the source and destination operands are implicit (this is indicated by having between the first

two slashes), the instruction can be written as simply FADD. In this case, when the 8087 executes

the instruction, it will automatically add the number at the top of the stack ST, to the number in thenext location under it in the stack ST(1). The 8087 stack will be incremented by 1, so the register

containing the result will be ST.

2. The source operand is specified and the destination operand is implicit ie FADD source. The source

can be one of the stack element or memory location.

Eg: FADD ST(2) ;will add the number from two locations below ST to the number in ST and leave

the result in ST, so ST is the implicit destination.

FADD CORRECTION_FACTOR ;will add a real number from the memory location named

CORRECTION_FACTOR to the number in ST and leave the result in ST.


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The assembler will be able to determine whether the number in memory is a short-real, long-real, or

temporary-real by the way CORRECTION_FACTOR was declared. Short-real is declared with DD

directive, long-real with DQ directive, temporary-real with DT directive.

3. Both the source and destination operands are specified by the user ie FADD destination, source. The

source can be one of the stack elements or a number from memory location and destination has to

be one of the stack elements.

Eg: FADD ST(2), ST(1) ;will add the number one location down from ST to the number two

locations down from ST and leave the result in ST(2).FADD ST(3), CORRECTION_FACTOR ;will a real number from the memory location named

CORRECTION_FACTOR to the contents of ST(3) and leave the result in ST(3).

A memory operand may be addressed by any one of the 8086s data addressing modes. The data type of

the memory operand may be word integer, short integer, long integer, packed BCD, short real, long real

or temporary real.

If 8087 detects an error condition, usually called an exception, while it is executing an instruction, it will

set the appropriate bit in its status register. After the instruction finishes executing, the status register

contents can be transferred to memory with another 8087 instruction. Then you can check status bits

using 8086 instructions and decide what action to take if an error has occurred.

If you send the 8087 a control word which unmasks the exception interrupts, the 8087 will also send out

a hardware interrupt signal when an error occurs. This signal can be used to send the 8086 directly to an

exception handling procedure.

DATA TRANSFER INSTRCTIONS:

There are three basic data transfers: floating-point, integer, and BCD. The only time that data ever

appear in the signed integer or BCD form is in memory. Inside the coprocessor, data are always stored

as 80-bit extended-precision floating-point numbers.

A memory operand whose type is word integer, short integer, long integer, short real, long real,

temporary real, or packed BCD can be converted to temporary real and then pushed onto the registerstack, or a register can be pushed onto the stack.

Conversely, the contents of the top stack element can be converted from temporary real to the

destinations data format, and then stored in memory.

Also, instructions are available for popping the contents of a register from the stack and exchanging the

contents of a register with the top of the stack. The tag register is updated following each data transfer

instruction.

Data Transfer Instructions:

Name: Mnemonic and Operand Form: Description and possible errors:

Load realFLD SRC (SRC:ST (i) or memory operand short real,

long real, or temporary real type)

Decrement ST, convert the content of SRC totemporary real, and put the result in (ST).

Errors: I, D

Load integerFILD SRC (SRC:Word integer, short integer, long integer

memory operand)


Errors: I

Load BCD FBLD SRC(SRC: Packed decimal memory operand)



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Errors: I

Store realFST DST

(DST: ST(i) or memory operand of shortreal or long real)

Convert (ST) to the destinations real format,and store the result into DST.Errors: I, O, U, P

Store integerFIST DST

(DST: Word integer, short integer, longinteger memory operand)

Convert (ST) to integer, and store the result

into DST.Errors: I, P

Store BCD

and pop

FBSTP DST

(DST: Packed decimal memory operand)

Convert (ST) to packed decimal, store theresult in DST, and increment ST.

Errors: I, P

Store realand pop

FSTP DST

(DST: ST(i) or memory operand of short

real, long real, or temporary real type)

Convert (ST) to the destinations real format,and store the result into DST, and increment

ST. Errors: I, O, U, P

Store integerand pop

FISTP DST(DST: word integer, short integer, longinteger memory operand)

Convert (ST) to integer, and store the resultinto DST, and increment ST.Errors: I, P

ExchangeRegister

FXCH //DST

(DST: ST(i), if not specified, ST(1) isassumed)

Interchange the contents of destination

register with (ST)Errors: I

Floating-Point Data Transfer:

FLD source: Load real.

It decrements the stack pointer by one and copies a real number from a stack element or memory location to the

new ST. A short-real or long-real number from memory is automatically converted to temporary-real format by

the 8087 before it is put in ST. Exceptions: I, D.

Eg: FLD ST(3) ;Copies ST(3) to ST.

FLD LONG_REAL[BX] ;Number from memory copied to ST.

FST destination: Store real

It copies ST to a specified stack position or to a specified memory location. If a number is transferred to amemory location, the number and its exponent will be rounded to fit in the destination memory location.

Exceptions: I, O, U, P.

Eg: FST ST(2) ;Copy ST to ST(2)

FST SHORT_REAL[BX] ;Copy ST to memory location at SHORT_REAL.


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FSTP destination: Store real and POP

It copies ST to a specified stack position or to a specified memory location and increments the stack pointer by

1 to point to the next element on the stack. This is a stack pop operation. It is identical to FST except for the

effect on the stack. Exceptions: I, O, U, P.

Eg: FST ST(2) ;Copy ST to ST(2), and increment stack pointer.

FST SHORT_REAL[BX] ;Copy ST to memory location at SHORT_REAL, and increment stack

pointer.

FXCH //destination: Exchange registers

It exchanges the contents of ST with the contents of a specified stack element. If destination is not specified,

then ST(1) is used. Exceptions: I.

Eg: FXCH ST(5) ;Swap ST and ST(5)

FXCH ;Swap ST and ST(1)

Integer Data Transfer:

FILD source: Load integer.

It decrements the stack pointer by one, convert the contents source ie integer number to temporary-real format,

and put the result in ST. Exceptions: I.

Example: FILD DWORD PTR[BX] ;Converts short integer from memory at [BX] to temporary-real formatand put the result in ST.

FIST destination: Store integer

It converts contents of ST to integer, and stores the result in destination memory location. Exceptions: I, P.

Example: FIST LONG_INT ;Converts contents of ST to integer, and stores the result in destination

memory location named LONG_INT,FISTP destination: Store integer and POP

It is identical to FIST except that stack pointer is incremented after copy. Exceptions: I, P.

Example: FISTP LONG_INT ;Converts contents of ST to integer, and stores the result in destinatio

memory location named LONG_INT, and increments stack pointer.Packed Decimal Transfers:

FBLD source: Load BCD

It decrements the stack pointer by one, convert the contents source ie decimal number to temporary-real format,

and put the result in ST. Exceptions: I.

Example: FBLD MONEY_DUE ;Converts 10 byte BCD number (ie MONEY_DUE was declared with DTdirective) to temporary-real format and put the result in ST

FBSTP destination: Store BCD and pop

It converts the contents of ST to 10-byte packed decimal, stores the result in destination, and increments the

stack pointer by one. Exceptions: I.


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Example: FBSTP TAX ;Converts the contents of ST to packed BCD and sent memory location namedTAX, the TAX was declared using DT directive.

ARITHMETIC INSTRUCTIONS:

The 8087 has variety of instructions for performing arithmetic operations addition, subtraction,

multiplication, and division. Results are always stored on the top of the register stack or in a specified

register, and one of the source operands must be the top of the stack.

For real arithmetic instructions, the other operand may be located in a specified register or in memory.

Special forms are provided to pop the stack after the arithmetic operation is completed.

The data is internally represented in the temporary real format, the arithmetic involving operands of

other types can be accomplished by first loading the operands into the appropriate registers using data

transfer instructions, and then performing the real arithmetic operation.

However, arithmetic instructions are provided that will accept memory operands of short real, long real

word integer, or short integer, and automatically convert these operands to temporary real before

performing their operations.

In addition to the basic arithmetic operations, the 8087 provides instructions to calculate the square root,

adjust scale values using the power of 2, perform modulo division, round real values to integer values

extract the exponent and fraction, take the absolute value, and change the sign.

These instructions operate on the top one or two stack elements, and the result is left on the top of the

stack.

Arithmetic Instructions:

Name: Mnemonic and Operand Form: Description and possible errors:

Add realFADD //SRC/DST, SRC(See note for operand forms)

(DST) (DST) + (SRC)Errors: I, D, O, U, P

Add realand pop

FADDP DST, SRC(DST: ST(i), SRC: ST)

(ST(i)) (ST(i)) + (ST), Increment ST,Errors: I, D, O, U, P

Add integer

FIADD SRC

(SRC: word integer, or short integermemory operand)

(ST) (ST) + (SRC),

Errors: I, D, O, U, P

Subtract real FSUB //SRC/DST, SRC

(See note for operand forms)

(DST) (DST) - (SRC)


Subtract realand pop

FSUBP DST, SRC(DST: ST(i), SRC: ST)

(ST(i)) (ST(i)) - (ST), Increment ST,Errors: I, D, O, P

Subtract realReversed

FSUBR //SRC/DST, SRC(See note for operand forms)

(DST) (SRC) - (DST)Errors: I, D, O, U, P

Subtract realreversed and pop

FSUBRP DST, SRC(DST: ST(i), SRC: ST)

(ST(i)) (ST) - (ST(i)), Increment ST,Errors: I, D, O, P

Subtract integer FISUB SRC (ST) (ST) - (SRC),


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Subtract integer

Reversed

FISUBR SRC(SRC: word integer, or short integer

memory operand)

(ST) (SRC) - (ST),

Errors: I, D, O, P

Multiply realFMUL //SRC/DST, SRC(See note for operand forms)

(DST) (DST) * (SRC)Errors: I, D, O, U, P

Multiply real

and pop

FMULP DST, SRC

(DST: ST(i), SRC: ST)

(ST(i)) (ST(i)) * (ST), Increment ST,


Multiply integerFIMUL SRC


(ST) (ST) * (SRC),Errors: I, D, O, U, P

Divide realFDIV //SRC/DST, SRC


(DST) (DST) / (SRC)

Errors: I, D, Z, O, U, P

Divide realand pop

FDIVP DST, SRC(DST: ST(i), SRC: ST)

(ST(i)) (ST(i)) / (ST), Increment ST,Errors: I, D, Z, O, U, P

Divide real

Reversed

FDIVR //SRC/DST, SRC


(DST) (SRC) / (DST)


Divide real

reversed and pop

FDIVRP DST, SRC

(DST: ST(i), SRC: ST)

(ST(i)) (ST) / (ST(i)), Increment ST,


Divide integer FIDIV SRC(SRC: word integer, or short integer

memory operand)

(ST) (ST) / (SRC)


Divide integerreversed

FIDIVR SRC(SRC: word integer, or short integer

memory operand)

(ST) (SRC) / (ST)Errors: I, D, Z, O, U, P

Absolute valueFABS

(No operands)(ST) |(ST)|Errors: I

Change signFCHS

(No operands)

(ST) -(ST)

Errors: I

Partial remainderFPREM

(No operands)

(ST) (ST) mod (ST(1))

Errors: I, D, U

Round to integerFRNDINT

(No operands)

(ST) integer of (ST)(Rounding mode is determined by RC field of

the control word) Errors: I, P


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ScaleFSCALE

(No operands)

(ST) (ST) * 2n

Where n is the integral part of (ST(1))

Errors: I, O, U

Square rootFSQRT

(No operands)(ST) ()Errors: I, D, P

Extract exponentand fraction

FXTRACT

(No operands)

(Temp Reg 1) exponent of (ST)(Temp Reg 2) fraction of (ST)

(ST) (Temp Reg 1)Decrement ST(ST) (Temp Reg 2)

Errors: I

Note: If DST is not specified, ST is assumed and SRC must be a memory operand of the short real or long real

type. If both are specified, they must be ST, ST(i) or ST(i), ST. When neither is given, then ST(1), ST is

assumed and after the arithmetic operation is performed, the stack is popped and the result is left at thenew top of the stack.

Addition Instructions:

FADD//SRC/DST, SRC:Add real. (DST) (DST) + (SRC)

Add real from specified source to real at specified destination. Source can be stack element or memory location.

Destination must be a stack element. If both source and destination is not specified, then ST is added to ST(1)

and stack pointer is incremented so that the result of addition is at ST. Exceptions: I, D, O, U, P.

Example: FADD ST(3), ST ;Add ST to ST(3), result in ST(3)FADD ST, ST(4) ;Add ST(4) to ST, result in ST

FADD INTEREST ;Add real from memory to ST, result in ST

FADD ;Add ST to ST(1), result in ST

FADDP DST, SRC:Add real and pop, DST:ST(i), SRC:ST, (ST(i)) (ST(i)) + (ST), Increment ST.

Add ST to specified stack element and increment stack pointer by 1. Exceptions: I, D, O, U, P.

Example: FADDP ST(1) ;Add ST(1) to ST. Increment stack pointer so ST(1) becomes ST.

FIADD DST, SRC:Add integer, SRC: word integer or short integer from memory, (ST) (ST) + (SRC)

Add integer from memory to ST, result in ST. Exceptions: I, D, O, P.

Example: FIADD CARS_SOLD ;Integer number from memory + ST


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Subtraction Instructions:

FSUB//SRC/DST, SRC:Subtract real (destination - source), (DST) (DST) - (SRC)

Subtract the real number at the specified source from the real number at the specified destination and put the

result in the specified destination. Exceptions: I, D, O, U, P.

Example: FSUB ST(2), ST ;Subtract ST from ST(2), and puts the result in ST(2)

FSUB CHARGE ;ST real number from memory, result in STFSUB ;ST - ST(1), result in ST

FSUBP DST, SRC:Subtract real and pop, DST:ST(i), SRC:ST, (ST(i)) (ST(i)) - (ST), Increment ST.

Subtracts ST from specified stack element and put the result in specified stack element, then increment stack

pointer by 1. Exceptions: I, D, O, U, P.

Example: FSUBP ST(1) ;ST(1)-ST, ST(1) becomes new ST.

FISUB SRC:Subtract integer, SRC: word integer or short integer from memory, (ST) (ST) - (SRC)

Integer from memory subtracted from ST, result in ST. Exceptions: I, D, O, P.

Example: FISUB CARS_SOLD ;ST=ST-integer from memory

Reversed Subtraction:

FSUBR//SRC/DST, SRC : (DST) (SRC) - (DST)

FSUBRP DST, SRC : DST:ST(i), SRC:ST, (ST(i)) (ST) - (ST(i)), Increment ST.

FISUBR SRC

: SRC: word integer or short integer from memory, (ST) (SRC) - (ST)

These instructions operate same as described previously, except that these subtracts the contents of specified

destination from source and put the difference in specified destination.

Multiplication Instructions:

FMUL//SRC/DST, SRC:Multiply real, (DST) (DST) * (SRC)

Multiply real number from source by real number from destination and put the result in specified stack element

Exceptions: I, D, O, U, P.

FMULP//SRC/DST, SRC: Multiply real and pop, (DST) (DST) * (SRC), Increment ST.

Multiply real number from source by real number from specified destination and put the result in specified stack

element, and increment stack pointer by 1. With no specified operands FMULP multiplies ST(1) by ST and

pops stack to leave result at ST. Exceptions: I, D, O, U, P.

FIMUL source: Multiply Integer

Multiply integer from memory times ST and put result in ST. Exceptions: I, D, O, P.


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Example: FIMUL DWORD PTR [BX]

Division Instructions:

FDIV //source/destination, source: Divide real

Divide destination real, by source by real, result goes in destination. Exceptions: I, D, Z, O, U, P.

FDIVP destination, source: Divide real and pop

Divide destination real, by source by real, result goes in destination, increment stack pointer by 1 after division

Exceptions: I, Z, D, O, U, P.

FIDIV source: Divide integer

Divide ST by integer from memory, result in ST. Exceptions: I, Z, D, O, U, P.

Reversed Division:

FDIVR //source/destination, source

FDIVRP destination, source

FIDIVR source

These instructions are identical in format to the FDIV, FDIVP, and FIDIV instructions, except they divide the

source operand by the destination operand and put the result in destination.

Other arithmetic operations:

FABS: Absolute value, No operands, (ST) |(ST)|

Number in ST is replaced by its absolute value. Instruction simply makes sign positive. Exception: I

FCHS: Change sign, No operands, (ST) -(ST)

Complements the sign of the number in ST. Exception: I

FPREM: Partial remainder, No operands, (ST) (ST) mod (ST(1))

The contents of ST(1) are subtracted from the contents of ST over and over again until the contents of ST are

smaller than the contents of ST(1). FPREM can be used to reduce a large angle to less thanso that the 8087

trig functions can be used on it. Exceptions: I, D, U.

FRNDINT: Round to integer, No operands, (ST) integer ST

Round number in ST to an integer. The round-control(RC) bits in the control word determine how the number

will be rounded. If the RC bits are set for down or chop, a number such as 205.73 will be rounded to 205. If the

RC bits are set for up or nearest, 205.73 will be rounded to 206. Exceptions: I, P.

FXTRACT: Separates the exponent and the significand parts of a temporary real number in ST. After the

instruction executes, ST contains a temporary-real representation of the significand of the number and ST(1)

contains a temporary-real representation of the exponent of the number. These two could then be written out to

memory locations. Exception: I


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FABS: Number in ST is replaced by its absolute value. Instruction simply makes sign positive. Exception: I.

FCHS: Complements the sign of the number in ST. Exception: I.

COMPARE INSTRUCTIONS:

The compare instructions compare the top of the register stack with the source operand, which may be in

other register or in memory, and set the condition code accordingly.

The top stack element may also be compared to 0, or examined to determine its tag, sign, ornormalization.

Condition code settings can be examined by the 8086 or 8088 by storing the status register of the 8087

in memory using a proper 8087 processor control instruction.

Compare Instructions:

Name: Mnemonic and Operand Forms: Description and Possible Errors:Compare real FCOM //SRC

(SRC: ST(i), or memory operand of theshort real or long real type. If not

specified, ST(1) is assumed)

(ST) - (SRC), and set condition code as in

Note 1.Errors: I, D

Compare realand pop

FCOMP //SRC(SRC: ST(i), or memory operand of the

short real or long real type. If notspecified, ST(1) is assumed)

(ST) - (SRC), and set condition code as inNote 1.

Increment ST.Errors: I, D

Compare real

and pop twice

FCOMPP

(No operands)

(ST) - (ST(1)), and set condition code as in

Note 1. Increment ST by 2Errors: I, D

Compare integer FICOM SRC(SRC: word integer or short integermemory operand)

(ST) - (SRC), and set condition code as inNote 1.Errors: I, D

Compare integer

and pop

FICOMP SRC

(SRC: word integer or short integermemory operand)

(ST) - (SRC), and set condition code as in

Note 1. Increment ST.Errors: I, D

Test top of stack FTST

(No operands)

(ST) 0.0, and set condition code as in

Note 2. Errors: I, D

Examine top ofstack FXAM(No operands) Set condition codes according to (ST) as inNote 3.


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Note 1: Note 3:

Order C3 C0 (ST) C3 C2 C1 C0

(ST) > (SRC) 0 0 +Unnormal 0 0 0 0

(ST) < (SRC) 0 1 +NAN 0 0 0 1

(ST) = (SRC) 1 0 -Unnormal 0 0 1 0

Not comparable 1 1 -NAN 0 0 1 1

+Normal 0 1 0 0

Note 2: + 0 1 0 1Order C3 C0 -Normal 0 1 1 0

(ST) > 0.0 0 0 - 0 1 1 1

(ST) < 0.0 0 1 +0 1 0 0 0

(ST) = 0.0 1 0 Empty 1 0 0 1

Not comparable 1 1 -0 1 0 1 0

Empty 1 0 1 1

+Denormal 1 1 0 0

Empty 1 1 0 1

-Denormal 1 1 1 0

Empty 1 1 1 1

The compare instructions with COM in their mnemonic compare contents of ST with contents of

specified or default source. The source may be another stack element or real number in memory. These

compare instructions set the condition code bits C3, C2, and C0 of the status word.

FCOM // source:Compares ST with real number in another stack element or memory. Exceptions: I, D.

Example: FCOM ;Compares ST with ST(1)

FCOM ST(3) ;Compares ST with ST(3)

FCOM Minimum ;Compares ST with real from memory

FCOMP // source: Identical to FCOM except that the stack pointer is incremented by 1 after the compare

operation. Old ST(1) becomes new ST.

FCOMPP:Compares ST with ST(1) and increment stack pointer by 2 after compare. This puts the new ST

above the two numbers compared. Exception: I, D.

FICOM source:Compares ST to a short or long integer from memory. Exceptions: I, D.

FICOMP source:Identical to FICOM except stack pointer is incremented by 1 after compare.

FTST:Compares ST with 0 and sets the condition code bits. Exceptions: I, D.

FXAM:Tests ST to see if it is 0, infinity, unnormalized, or empty.

TRANSCENDENTAL INSTRUCTIONS:

The transcendental instructions calculate tan (0 < < /4), tan1

(Y/X) (0 < Y < X < ), 2X 1 (0 X

0.5), Y*, and Y*( + ). All transcendental instructions use ST or ST(1) as their operandsand the results are stored back on the stack.


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Other common trigonometric, inverse trigonometric, hyperbolic, inverse hyperbolic, logarithemic, and

exponential functions can be derived from these five functions through mathematical identities. For

example, calculation of the natural log of X is equivalent to (

).

As an example involving the trigonometric functions, consider the partial tangent instruction, FPTAN

which computes the tan , where in radians is the (ST) and is between 0 and /4. The result is a ratio

Y/X, with Y replacing and X being pushed onto the stack. The sine function is related to the tangent

function as follows:Sin =

When 0 <


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NOTE: FPTAN does not work correctly for angles of exactly 0 and /4. You can convert an angle from degrees

to radians by dividing it by 57.295779. An angle greater than /4 can be brought into range with the 8087

FPREM instruction. The Y value replaces the angle on the stack, and the X value is pushed on the stack to

become the new ST. The values for X and Y are created separately so you can use them to calculate other trig

functions for the given angle. Exceptions: I, P.

FPATAN:Computes the angle whose tangent is Y/X. The X value must be ST, and the Y value must be in

ST(1). Also, X and Y must satisfy the inequality 0 < Y < X < . The resulting angle expressed in radiansreplaces Y in the stack. After the operation the stack pointer is incremented so the result is then ST. Exceptions

I, D.

F2XM1:Computes the function Y = 2X 1 for an X value in ST. The result Y replaces X in ST. X must be in

the range 0 X 0.5. To produce 2X, you can simply add 1 to the result from this instruction. Using some

common equalities, you can produce values often needed in engineering and scientific calculations.

Examples:

10X= 2

X( )

eX= 2X( )Y

X= 2

X( )

FYL2X:Calculates Y times the LOG to the base 2 of X or Y (). X must be in the range of 0 < X < and Y must be in the range -< Y < +. X must initially be I ST and Y must be in ST(1). The result replaces Y

and then the stack is popped so that the result is then at ST. This instruction can be used to compute the log of a

number in any base, n, using the identity = (). For a given n, is a constant whichcan be easily calculated and used as the Y value for the instruction. Exceptions: P.

FYL2XP1: Computes the function Y times the LOG to the base 2 of (X+1) or Y ( ( + )). This

instruction is almost identical to FYL2X except that it gives more accurate results when computing the LOG ofa number very close to 1.

INSTRUCTIONS WHICH LOAD CONSTANTS:

The following instructions simply push the indicated constant onto the stack. Having these commonly

used constants available reduces programming effort.

They are used to +0.0, +1.0, , , , , or onto the register stack. These constantsare stored in temporary real format and have accuracy of up to approximately 19 decimal digits.

Name: Mnemonic: Description:

Load zero FLDZ Decrement ST Error: I(No operands) (ST) 0.0

Load oneFLD1 Decrement ST

Error: I(No operands) (ST) 1.0

Load FLDPI Decrement ST

Error: I(No operands) (ST)


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Load FLDL2E Decrement ST


Load FLDL2T Decrement ST


Load FLDLG2 Decrement ST

Error: I

(No operands) (ST)

Load FLDLN2 Decrement ST


FLDZ:Push 0.0 on stack.

FLDI: Push +1.0 on stack.

FLDPI:Push the value of on stack.

FLD2T:Push LOG of 10 to the base 2 on stack ( ).

FLDL2E:Push LOG of e to the base 2 on stack ( ).

FLDLG2:Push LOG of 2 to the base 10 on stack ( ).

FLDLN2:Push LOG of 2 to the base e on stack ( ).

PROCESSOR CONTROL INSTRUCTIONS:

These instructions do not perform computations. They are used to do tasks such as initializing the 8087

enabling interrupts, writing the status word to memory, etc.

Instruction mnemonics with a N as the second character have the same function as those without the N

but they put an NOP in front of the instruction instead of putting a WAIT instruction there.

Name: Mnemonic: Description:

Initialize Processor FINIT/FNINIT

(No operands)

Reset the 8087. Set control word to 03FF and set tag

register to empty. Clear all error, busy, and interruptflags. Reset ST to 0.

Disable interrupts FDISI/FNDISI

(No operands)

Set interrupt mask bit to 1.

Enable interrupts FENI/FNENI(No operands)

Clear interrupt mask bit.

Clear error flags FCLEX/FNCLEX

(No operands)

Clear B, IR, P, U, O, Z, D, and I in

the status register.

Increment stackpointer

FINCSTP(No operands)

ST ST+1(It does not set the tag of the previous

top of stack register to empty)


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Decrement stackpointer

FDECSTP(No operands)

ST ST-1

Store status register FSTSW/FNSTSW DST(DST: 2-byte memory

operand)

(DST) (Status register)

Store control register FSTCW/FNSTCW DST(DST: 2-byte memory

operand)

(DST) (Control register)

Load control register FLDCW SRC(SRC: 2-byte memory

operand)

(Control register) (SRC)

Store environment FSTENV/FNSTENV DST(DST: 14-byte memory

operand)

(DST) (Control register)(DST + 2) (Status register)

(DST + 4) (Tag register)(DST + 6) (Instruction pointer)

(DST + 10) (Operand pointer)Sets all error masks.

Load environment FLDENV SRC

(SRC: 14-byte memoryoperand)

(Control register) (SRC)

(Status register) (SRC + 2)(Tag register) (SRC + 4)

(Instruction pointer) (SRC + 6)(Operand pointer) (SRC + 10)

FINIT/FNINT: Initializes 8087. Disables interrupt output, sets stack pointer to register 7, sets default status.

FDISI/FNDISI:Disables the 8087 interrupt output pin so that it cannot cause an interrupt when an exception

(error) occurs.

FENI/FNENI:Enables 8087 interrupt output so it can cause an interrupt when an exception occurs.

FLDCW source: Loads a status word from a named memory location into the 8087 status register. This

instruction should be preceded by the FCLEX instruction to prevent a possible exception response if an

exception bit in the status word is set.

FSTCW/FNSTCW destination:Copies the 8087 control word to a named memory location where you candetermine its current value with 8086 instruction.

FSTSW/FNSTSW destination: Copies the 8087 status word to a named memory location. You can check

various status bits with 8086 instructions and base further action on the state of these bits.

FCLEX/FNCLEX: Clears all the 8087 exception flag bits in the status register. Unasserts BUSY and INT

outputs.


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FSAVE/FNSAVE destination:Copies the 8087 control word, status word, pointers, and entire register stack to

a named, 94byte area of memory. After copying all this, the FSAVE/FNSAVE instruction initializes the 8087

as if the FINIT/FNINIT instruction had been executed.

FRSTOR source:Copies a 94byte named area of memory into 8087 control register, status register, pointer

registers, and stack registers.

FSTENV/FNSTENV destination: Copies the 8087 control register, status register, tag words, and exception

pointers to a named series of memory locations. This instruction does not copy the 8087 register stack to

memory as the FSAVE/FNSAVE instruction does.

FLDENV source: Loads the 8087 control register, status register, tag word, and exception pointers from a

named area in memory.

FINCSTP: Increments the 8087 stack pointer by 1. If the stack pointer contains 111 and it is incremented, it

will point to 000.

FDECSTP:Decrements the 8087 stack pointer by 1. If the stack pointer contains 000 and it is decremented, it

will point to 111.

FFREE destination:Changes the tag for the specified destination register to empty.

FNOP:Performs no operation. Actually copies ST to ST.

FWAIT:This instruction is actually an 8086 instruction which makes the 8086 wait until it receives a notbusy

signal from the 8087 to its TEST pin. This is done to sure that neither the 8086 nor the 8087 starts the next

instruction before the preceding 8087 instruction is completed.

QUESTIONS APPEARED IN EXAM:

1)

Explain the following instructions of 8087 coprocessor with suitable examples:

i. FILD ii. FXCH iii. FLDPI iv. FINIT (June 2011) (08 Marks)

2) Draw the formats of STATUS and CONTROL registers of 8087 NDP and define each bit.

(June 2011) (08 Marks)

3)

Explain the different 8087 data types along with their format. (Dec 2010) (10 Marks)

4) Explain the control register format of 8087. (Dec 2010) (05 Marks)

5)

Explain the following instructions: i. FMULP ST(1), ST ii. FSQRT iii. FLD QWORD PTR[SI]

iv. FLDPI v. FBLD LOC (Dec 2010) (05 Marks)

6)

Explain the different types of floating point numbers stored in the memory by the coprocessor.(June 2010) (05 Marks)

7)

Draw the internal structure of 80x87 arithmetic coprocessor and explain. (June 2009) (10 Marks)

8) Explain the following 8087 coprocessor instructions: i. FSQRT ii. FSTP iii. FSCALE

iv. FRNDINT v. FCOM (June 2009) (10 Marks)

9)

What is a coprocessor? Why it is called so? Give the significance of 8087 NDP (numerical data

processor) (Dec 2009) (06 Marks)

10) Explain the various data types that 8087 can handle. Give examples. (Dec 2009) (06 Marks)


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11)Write a program to obtain the hypotenuse of a right angles triangle given its sides A & B using 8087

interfaced to 8086. (Dec 2009) (08 Marks)

Solution:

.MODEL SMALL

DATA SEGMENT WORD PUBLIC

SIDE_A DD 3.0

SIDE_B DD 4.0

HYPOTENUSE DD 0

CONTROL_WORD DW 0

STATUS_WORD DW 0

DATA ENDS

CODE SEGMENT WORD PUBLIC

ASSUME CS:CODE, DS:DATA

START: MOV AX, DATA

MOV DS, AX

FINIT

MOV CONTROL_WORD, 03FFh

FLDCW CONTROL_WORD

FLD SIDE_A

FMUL ST, ST(0)

FLD SIDE_B

FMUL ST, ST(0)

FADD ST, ST(1)

FSQRT

FSTSW STATUS_WORD

MOV AX, STATUS_WORD

AND AL, 0BFh

JNZ STOP

FSTP HYPOTENUSE

STOP: NOP

CODE ENDSEND START

12)Convert the following:

i.

Decimal 1259.125 to single precision number

ii. Decimal -29.563 to long real form

iii. Short real 010111010110011100.0 to decimal (June 2010) (09 Marks)

13)Write an ALP to find the roots of a quadratic equation x2+3x+2=0. (June 2010) (11 Marks)

Solution:

.MODEL SMALL

.8086

.8087

.DATA

TWO DD 2.0

FOUR DD 4.0

A1 DD 1.0

B1 DD 0.0

C1 DD -9.0

R1 DD ?

R2 DD ?


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.CODE

.STARTUP

FLDZ

FST R1

FSTP R2

FLD TWO

FMUL A1

FLD FOUR

FMUL A1

FMUL C1FLD B1

FMUL B1

FSUBR

FTST

FSTSW AX

SAHF

JZ ROOTS1

FSQRT

FSTSW AX

TEST AX,1

JZ ROOTS1

FCOMPPJMP ROOTS2

ROOTS1: FLD B1

FSUB ST, ST(1)

FDIV ST, ST(2)

FSTP R1

FLD B1

FADD

FDIVR

FSTP R2

ROOTS2: .EXIT

END

14)

Represent 178.625 using 80 bit temporary real format for expressing the answer. (June 2011) (04 Marks)

Ans: In binary 178.625=10110010.101

Normalized binary number= 1.0110010101x2^7

For short real format: E=127+7=134=86h, S=0, F=0110010101

The number= 0 10000110 01100101010000000000000=4332A000h

For long real format: E=3FFh+7h=406h, S=0, F=0110010101

The number= 0 10000000110 01100101010000.0=4066540000000000h

For temporary real format: E=3FFFh+7h=4006h, S=0, F=0110010101The number= 0 100000000000110 1011001010100000000.0=4006B2A0000000000000h


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CODING 8087 INSTRUCTIONS:

Common 8086 assemblers such as MASM and TASM accept 8087 mnemonics, and an assembler is the

only practical way to produce codes for 8087 programs.

And also Intel has a software package that emulates all 8087 instructions. For a program to be executed

by emulation, the FWAIT instruction, which is an alternate mnemonic for the WAIT instruction, must

be used for synchronization.

Because there is no 8087 to activate the TEST pin for emulated execution, the package will change anyFWAIT or inserted WAIT to a NOP to avoid an endless wait. However explicit WAIT instructions are

eliminated from the users object code.

8087 coprocessor

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