8086 instruction set & assembly language...

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Unit 3 8086 INSTRUCTION SET & ASSEMBLY LANGUAGE PROGRAMMING -Addressing modes - Instruction set - Data transfer instructions - String instructions -Logical Instructions -Arithmetic Instructions - Transfer of control instructions -Processorcontrol Instructions -Assembly language programming –Assembler

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Page 1: 8086 INSTRUCTION SET & ASSEMBLY LANGUAGE …chettinadtech.ac.in/storage/12-06-26/12-06-26-12-08-37-1563-ravind...Unit 3 8086 INSTRUCTION SET & ASSEMBLY LANGUAGE PROGRAMMING -Addressing

Unit 38086 INSTRUCTION SET &

ASSEMBLY LANGUAGE PROGRAMMING

-Addressing modes - Instruction set - Data transfer instructions - String instructions -Logical Instructions -Arithmetic Instructions - Transfer of control instructions -Processorcontrol Instructions -Assembly language programming –Assembler

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OVERVIEW

ADDRESSING MODES OF 8086

Definition: An instruction acts on any number of operands. The way an instruction accesses its operands is called its Addressing modes.

Operands may be of three types:

o Implicit o Explicit o Both Implicit and Explicit.

Implicit operands mean that the instruction by definition has some specific operands. The programmers do NOT select these operands.

Example: Implicit operands

XLAT; automatically takes AL and BX as operands AAM; it operates on the contents of AX.

Explicit operands mean the instruction operates on the operands specified by the programmer.

Example: Explicit operands

MOV AX, BX; it takes AX and BX as operands XCHG SI, DI; it takes SI and DI as operands

Implicit and explicit operands

Example: Implicit/Explicit operands

MUL BX; automatically multiply BX explicitly times AX

The location of an operand value in memory space is called the Effective Address (EA)

We can classify the addressing modes of 8086 into four groups:

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• Immediate addressing • Register addressing • Memory addressing • I/O port addressing

The first three Addressing modes are clearly explained.

Immediate Addressing Mode

In this addressing mode, the operand is stored as part of the instruction. The immediate operand, which is stored along with the instruction, resides in the code segment -- not in the data segment. This addressing mode is also faster to execute an instruction because the operand is read with the instruction from memory. Here are some examples:

Example: Immediate Operands

MOV AL, 20 ; move the constant 20 into register AL ADD AX, 5 ; add constant 5 to register EAX MOV DX, offset msg ; move the address of message to register DX

Register addressing mode

In this addressing mode, the operands may be:

• reg16: 16-bit general registers: AX, BX, CX, DX, SI, DI, SP or BP. • reg8 : 8-bit general registers: AH, BH, CH, DH, AL, BL, CL, or DL. • Sreg : segment registers: CS, DS, ES, or SS. There is an exception:

CS cannot be a destination.

For register addressing modes, there is no need to compute the effective address. The operand is in a register and to get the operand there is no memory access involved.

Example: Register Operands

MOV AX, BX ; mov reg16, reg16 ADD AX, SI ; add reg16, reg16 MOV DS, AX ; mov

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Sreg, reg16

Some rules in register addressing modes:

1. You may not specify CS as the destination operand.

Example: mov CS, 02h –> wrong

2. Only one of the operands can be a segment register. You cannot move data from one segment register to another with a single mov instruction. To copy the value of cs to ds, you would have to use some sequence like:

Movds,cs->wrong movax,cs mov ds, ax -> the way we do it

You should never use the segment registers as data registers to hold arbitrary values. They should only contain segment addresses.

Memory Addressing Modes

Memory (RAM) is the main component of a computer to store temporary data and machine instructions. In a program, programmers many times need to read from and write into memory locations.

There are different forms of memory addressing modes

1. Direct Addressing 2. Register indirect addressing 3. Based addressing 4. Indexed addressing 5. Based indexed addressing 6. Based indexed with displacement

Direct Addressing Mode & Register Indirect Addressing Mode

Direct Addressing Mode

The instruction mov al,ds:[8088h] loads the AL register with a copy of the byte at memory location 8088h. Likewise, the instruction mov ds:[1234h],dl stores the value in the dl register to memory location 1234h. By default, all displacement-only values provide offsets into the data segment. If you want to provide an offset into a different segment, you must use a segment override prefix before your address. For example, to access location 1234h in the extra segment (es) you would use an instruction of the form mov

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ax,es:[1234h]. Likewise, to access this location in the code segment you would use the instruction mov ax, cs:[1234h]. The ds: prefix in the previous examples is not a segment override.

The instruction mov al,ds:[8088h] is same as mov al, [8088h]. If not mentioned DS register is taken by default.

Register Indirect Addressing Mode

The 80x86 CPUs let you access memory indirectly through a register using the register indirect addressing modes. There are four forms of this addressing mode on the 8086, best demonstrated by the following instructions:

mov al, [bx] mov al, [bp] mov al, [si] mov al, [di]

Code Example

MOV BX, 100H MOV AL, [BX]

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The [bx], [si], and [di] modes use the ds segment by default. The [bp] addressing mode uses the stack segment (ss) by default. You can use the segment override prefix symbols if you wish to access data in different segments. The following instructions demonstrate the use of these overrides:

mov al, cs:[bx] mov al, ds:[bp] mov al, ss:[si] mov al, es:[di]

Intel refers to [bx] and [bp] as base addressing modes and bx and bp as base registers (in fact, bp stands for base pointer). Intel refers to the [si] and [di] addressing modes as indexed addressing modes (si stands for source index, di stands for destination index). However, these addressing modes are functionally equivalent. This text will call these forms register indirect modes to be consistent.

Based Addressing Mode

8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the resulting value is a pointer to location where data resides.

Mov al, [bx],[si] Mov bl , [bp],[di] Mov cl , [bp],[di]

Code Example

If bx=1000h si=0880h Mov AL, [1000+880] Mov AL,[1880]

Indexed Addressing Modes

The indexed addressing modes use the following syntax:

mov al, [bx+disp] mov al, [bp+disp] mov al, [si+disp] mov al, [di+disp]

Code Example

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MOV BX, 100H MOV AL, [BX + 15] MOV AL, [BX + 16]

If bx contains 1000h, then the instruction mov cl, [bx+20h] will load cl from memory location ds:1020h. Likewise, if bp contains 2020h, mov dh, [bp+1000h] will load dh from location ss:3020. The offsets generated by these addressing modes are the sum of the constant and the specified register. The addressing modes involving bx, si, and di all use the data segment, the [bp+disp] addressing mode uses the stack segment by default. As with the register indirect addressing modes, you can use the segment override prefixes to specify a different segment:

mov al, ss:[bx+disp] mov al, es:[bp+disp] mov al, cs:[si+disp] mov al, ss:[di+disp]

Example: MOV AX, [DI + 100]

ased Indexed Addressing Modes & Based Indexed Plus Displacement Addressing Mode

Based Indexed Addressing Modes

The based indexed addressing modes are simply combinations of the register indirect addressing modes. These addressing modes form the offset by adding together a base register (bx or bp) and an index register (si or di). The allowable forms for these addressing modes are:

mov al, [bx+si] mov al, [bx+di] mov al, [bp+si] mov al, [bp+di]

Code Example

MOV BX, 100H MOV SI, 200H MOV AL, [BX + SI] INC BX INC SI

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Suppose that bx contains 1000h and si contains 880h. Then the instruction mov al,[bx][si] would load al from location DS:1880h. Likewise, if bp contains 1598h and di contains 1004, mov ax,[bp+di] will load the 16 bits in ax from locations SS:259C and SS:259D. The addressing modes that do not involve bp use the data segment by default. Those that have bp as an operand use the stack segment by default.

Based Indexed Plus Displacement Addressing Mode

These addressing modes are a slight modification of the base/indexed addressing modes with the addition of an eight bit or sixteen bit constant. The following are some examples of these addressing modes

mov al, disp[bx][si] mov al, disp[bx+di] mov al, [bp+si+disp] mov al, [bp][di][disp]

Code Example

MOV BX, 100H MOV SI, 200H MOV AL, [BX + SI +100H] INC BX INC SI

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Self check 1

MOV AL,[BX+3]?addressing? What is the physical address in MOV AL,[BX] if DS=2000 and BX=0020?

2.8086 Instruction Set

The following is a brief summary of the 8086 instruction set:

Data Transfer Instructions MOV Move byte or word to register or memory

IN, OUT Input byte or word from port, output word to port

LEA Load effective address

LDS, LES Load pointer using data segment, extra segment

PUSH, POP Push word onto stack, pop word off stack

XCHG Exchange byte or word

XLAT Translate byte using look-up table

Logical Instructions

NOT

AND

OR

XOR

TEST

Logical NOT of byte or word (one's complement)

Logical AND of byte or word

Logical OR of byte or word

Logical exclusive-OR of byte or word Test

byte or word (AND without storing)

Shift and Rotate Instructions

SHL, SHR Logical shift left, right byte or word by 1 or CL

SAL, SAR Arithmetic shift left, right byte or word by 1 or CL

ROL, ROR Rotate left, right byte or word by 1 or CL

RCL, RCR Rotate left, right through carry byte or word by 1 or CL

Arithmetic Instructions

ADD, SUB

ADC, SBB

INC, DEC

NEG

CMP

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MUL, DIV

IMUL, IDIV

CBW, CWD

AAA, AAS, AAM, AAD

DAA, DAS

Transfer Instructions

JMP

JA (JNBE)

JAE (JNB)

JB (JNAE)

JBE (JNA)

JE (JZ)

JG (JNLE)

JGE (JNL)

Add, subtract byte or word

Add, subtract byte or word and carry (borrow)

Increment, decrement byte or word

Negate byte or word (two's complement)

Compare byte or word (subtract without storing)

Multiply, divide byte or word (unsigned)

Integer multiply, divide byte or word (signed)

Convert byte to word, word to double word (useful

before multiply/divide)

ASCII adjust for addition, subtraction, multiplication,

division (ASCII codes 30-39)

Decimal adjust for addition, subtraction (binary coded

decimal numbers)

Unconditional jump

Jump if above (not below

or"equal) Jump if above or equal

(not below) Jump ifbelow (not

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JL (JNGE)

JLE (JNG)

JC, JNC

JO, JNO

JS, JNS

JNP (JPO)

Jp (JPE)

LOOP

LOOPE (LOOPZ)

LOOPNE (LOOPNZ)

JCXZ

Jump ifless (not greater nor equal)

Jump ifless or equal (not greater)

Jump if carry set, carry not set

Jump if overflow, no overflow

Jump if sign, no sign

Jump if no parity (parity odd)

Jump if parity (parity even)

Loop unconditional, count in CX

Loop if equal (zero), count in CX

Loop ifnot equal (not zero), count in CX

Jump if CX equals zero

Subroutine and Interrupt Instructions

CALL, RET Call, return from procedure

INT, INTO Software interrupt, interrupt if overflow

IRE T Return from interrupt

String Instructions

MOVS

MOVSB, MOVSW

CMPS

SCAS

LODS, STOS

REP

REPE, REPZ

REPNE, REPNZ

Move byte or word string

Move byte, word string

Compare byte or word string

Scan byte or word string

Load, store byte or word string

Repeat

Repeat while equal, zero

Repeat while not equal (zero)

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Processor Control Instructions

STC, CLC, CMC Set, clear, complement carry flag

S T D , C L D Set, clear direction flag

S T I, C L I Set, clear interrupt enable flag

LAHF, SAHF Load AH from flags, store AH into flags

PUSHF, POPF Push flags onto stack, pop flags offstack

E S C Escape to external processor interface

LOCK Lock bus during next instruction

NOP No operation (do nothing)

WAIT Wait for signal on TEST input

H L T Halt processor

The 8086 Instruction Set

The 8086 supports many instructions, most of which you do not need to be familiar with.

Refer to the documentation when using unfamiliar instructions since many instructions must use or

indirectly assume the use of specific registers.

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A description of the 8086 instructions you should be familiar with can viewed from the following link:

8086 Instruction Set

3.8086 Assembly Language

1) The 8086 is a 16-bit processor.

Because the word size is limited to 16-bits, many data types in C have different sizes then they do on the

spice machines or modern PCs. Below is a list of C data types and their sizes.

Type | Length | Range

---------------|---------|-----------------------------------------

unsigned char | 8 bits | 0 to 255

char | 8 bits | -128 to 127

enum | 16 bits | -32,768 to 32,767

unsigned int | 16 bits | 0 to 65,535

short int | 16 bits | -32,768 to 32,767

int | 16 bits | -32,768 to 32,767

unsigned long | 32 bits | 0 to 4,294,967,295

long | 32 bits | -2,147,483,648 to 2,147,483,647

Most importantly, note the range limitation on the int data type.

It is also important to realize that any operations on 32-bit data types (long and unsigned long) require from

several to very many instructions to perform operations. 32-bit operations in C should be avoided unless

absolutely necessary.

The following names are used to refer to data sizes on the 8086:

Length | Size Name

--------|-----------------------

4-bit | nibble

8-bit | byte

16-bit | word

32-bit | dword (or doubleword)

2) The 8086 uses little endian format.

This means that the least significant byte of a value is stored first (i.e., at the low address) in memory.

This gives the appearance of numbers being stored in memory backwards. For example, the 32-bit value

0x11223344 would be stored as bytes in the following order:

(low addr) (high addr)

0x44 0x33 0x22 0x11

This must be kept in mind when accessing different parts of data.

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3) The 8086 uses segmented memory.

� A memory address on the 8086 consists of two numbers, usually written in hexadecimal and

separated by a colon, representing the segment and the offset.

� This combination of segment and offset is referred to as a logical address.

� The segment number refers to a 64 KB block of memory and the offset is an index into the memory

segment.

� For example the address AB10:1024 corresponds to the byte stored in segment 0xAB10 at offset

0x1024.

� Both the segment and offset are represented by a 16-bit number, allowing each segment to be 2^16

bytes in size (i.e., 65536 bytes, or 64 KB).

� This would seem to suggest that the 8086 can address up to 2^32 bytes, or 4 GB, since 32 bits are

used for each address. This is NOT the case.

� When the processor obtains a logical address (segment and offset), it performs a simple calculation

to determine the 20-bit physical address in memory to which the logical address refers:

� physical address = (segment << 4) + offset

� This is equivalent to multiplying the segment by 16 and adding the offset (i.e., physical address =

segment * 16 + offset).

� This means that the 64 KB segments overlap, with a new segment starting every 16 bytes. This also

means that there can be more than one address for the same memory location.

� For example, 0000:0100, 0001:00F0, and 0010:0000 all refer to physical address 0x100. There are

even more examples we could give for that same memory location.

� In this class, you will not usually need to worry about segments because your programs will only

deal with the first segment of memory.

� In this case, you can think of memory as a single continuous piece of memory that is 64 KB in size.

4) Registers in the 8086 have intended uses.

� The 8086 has four 16-bit general purpose registers, five 16-bit offset registers for accessing memory,

four 16-bit segment registers also for memory access, and a 16-bit flags register.

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� Nine bits of the flags register are accessible to the programmer and each of these bits is referred to as

a flag.

� Each flag either indicates a condition or controls the behavior of certain instructions. For example,

the cmp instruction compares two numbers and sets flags based on the relationship between these

numbers.

� Other instructions, such as je (for jump if equal), can then be used, behaving differently depending

on the state of the flags previously set by the cmp instruction.

� Most instructions only allow certain registers to be used as operands and some instructions require

specific registers to be used.

� Therefore, it is important to be familiar with the different registers and their intended purposes.

However, there is still a lot of freedom in what registers can be used. Below is a list of the 8086

registers.

� This listing can also be obtained in Emu86 by entering "regs". For each register the assembly

symbol, name, and intended use are given.

Purpose Registers (a.k.a. scratch registers)

AX (AH,AL) Accumulator : Main arithmetic register

BX (BH,BL) Base : Generally used as a memory base or offset

CX (CH,CL) Counter : Generally used as a counter for loops

DX (DH,DL) Data : General 16-bit storage, division remainder

Offset Registers

IP Instruction pointer : Current instruction offset

SP Stack pointer : Current stack offset

BP Base pointer : Base for referencing values stored on stack

SI Source index : General addressing, source offset in string ops

DI Destination index : General addressing, destination in string ops

Segment Registers

CS Code segment : Segment to which IP refers

SS Stack segment : Segment to which SP refers

DS Data segment : General addressing, usually for program's data area

ES Extra segment : General addressing, destination segment in string ops

Flags Register (Respectively bits 11,10,9,8,7,6,4,2,0)

OF Overflow flag : Indicates a signed arithmetic overflow occurred

DF Direction flag : Controls incr. direction in string ops (0=inc, 1=dec)

IF Interrupt flag : Controls whether interrupts are enabled

TF Trap flag : Controls debug interrupt generation after instructions

SF Sign flag : Indicates a negative result or comparison

ZF Zero flag : Indicates a zero result or an equal comparison

AF Auxiliary flag : Indicates adjustment is needed after BCD arithmetic

PF Parity flag : Indicates an even number of 1 bits

CF Carry flag : Indicates an arithmetic carry occurred

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� The general purpose registers AX, BX, CX, and DX are 16-bit registers but each can also be used as

two separate 8-bit registers. For example, the high (or upper) byte of AX is called AH and the low

byte is called AL.

� The same H and L notation applies to the BX, CX, and DX. Most instructions allow these 8-bit

registers as operands.

� Registers AX, BX, CX, DX, SI, DI, BP, and SP can be used as operands for most instructions.

However, only AX, BX, CX, and DX should be used for general purposes since SI, DI, BP, and SP

are usually used for addressing.

5) The 8086 instructions can use register, immediate, and memory operands.

� The 8086 is not limited to immediate or register operands. Most instructions also allow memory

operands to be used.

� For example, if a word sized variable were pointed to by the value stored in register BX, the number

3 could be added to it using the following instruction:

o add word [bx], 3

� The brackets indicate that BX is to be used as a pointer to a memory location.

� The only limitation is that there can be only one memory reference per instruction. For example, the

following addition instruction is invalid:

o add word [bx], word [si] ; Bad instruction!

� Instead you would use two instructions:

o mov ax, [si] ; Load [si] into ax

o add [bx], ax ; Add to [bx]

6) The 8086 is the ancestor of modern Intel processors.

� 8086 code runs fine on modern x86 processors, such as the Pentium processors.

� However, modern x86 code rarely runs on an 8086.

� When experimenting with 8086 assembly language code, be careful to check the

processor on which instructions work.

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� Many instructions have been added since the 8086 was first produced so instructions

for newer processors must be avoided. The documentation for this class only covers

8086 instructions.

Referencing Memory

Segment and Offset � Recall that the 8086 uses logical addresses composed of a segment and an offset to reference

memory.

� Every memory reference on the 8086 will use one of the segment registers (i.e., DS, ES, SS, CS, or

SS) as the segment combined with an offset (usually given in the instruction) to determine the

physical address being referenced.

� The physical address referenced is always

o physical address = (segment << 4) + offset.

The Effective Address

� There are several ways to reference memory locations and specific registers that must

be used.

� A memory reference is placed in brackets to distinguish it from a register or

immediate value. In general, memory accesses take the form of the following

example:

� mov ax, [baseReg + indexReg + constant]

� This example copies a word sized value into the register AX. Combined, the three

parameters in brackets determine what is called the effective address, which is simply

the offset referenced by the instruction.

� The following rules apply:

� baseReg can be: bp or bx

� indexReg can be: si or di

� constant can be: 16-bit signed number if combined with registers,

as in "mov ax,[bp+2]"

� 16-bit unsigned number if by itself, as in "mov ax,[2]"

� Any one or two of the memory access parameters (i.e., constant, baseReg, or

indexReg) can be omitted, allowing for several memory access modes.

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� It is important to realize that the effective address, or offset, does NOT give the

complete address for the memory reference.

� A segment register is either implied or given in the instruction. This topic is discussed

in the section Segment Registers below.

� Segment Registers

� One of the segment registers is always used as the segment when evaluating an

address.

� The available segment registers are the Data Segment (DS), Extra Segment (ES),

Stack Segment (SS), or Code Segment (CS).

� Therefore, you must be aware of which segment register is used when an address is

evaluated as part of an instruction.

� When a memory reference is given in an instruction, the processor sums any

baseReg, indexReg, and constant that are given and uses this sum as the

offset into the segment.

� Which segment register that is used in the address calculation depends on the register

that is used for baseReg.

� The DS register is assumed for the segment unless baseReg is the register BP, in

which case SS is assumed.

� However, any segment register can be explicitly specified using what is called a

segment override prefix (discussed below). Also, some special instructions may

assume other segment registers.

Segment Overrides

� A segment override prefix allows any segment register (DS, ES, SS, or CS) to be used as the

segment when evaluating addresses in an instruction.

� An override is made by adding the segment register plus a colon to the beginning of the memory

reference of the instruction as in the following examples:

mov ax, [es:60126] ; Use es as the segment

mov ax, [cs:bx] ; Use cs as the segment

mov ax, [ss:bp+si+3] ; Use ss as the segment

Operand Size

A memory reference can be used as a source or destination operand for most 8086 instructions.

Any time a memory reference is given as part of an instruction, the size of the memory operand is either

implied or must be specified. For example consider the following instruction:

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mov ax, [bx]

This instruction will move the word stored at DS:BX and put it into AX.

The size of word is implied since the AX register is one word in size. In some cases the size of the operand

must be given in order for the assembler to generate an instruction.

For example, to increment a variable pointed to by BX, the assembler will not accept the following: inc [bx] ; WRONG!!

This is because it does not know if [bx] addresses a byte or word sized value. So the size of [bx] must be

specified, as in the following two examples: inc word [bx] ; Increment word at [bx]

inc byte [bx] ; Increment byte at [bx]

It is not necessary to specify the size if one of the operands has a known size, such as a register operand, as

in: add al, [bx] ; Assembler knows al is a byte so "byte [bx]" is assumed

Addressing Modes

Here are some examples of the allowed addressing modes:

xor cx, [59507] ; Direct mode (XOR CX with word at DS:E873)

push word [bx] ; Register-indirect mode (Push word at DS:BX onto

stack)

mov ax, [bp-4] ; Base mode (Move word at SS:(BP-4) into AX)

sub [si+2], bx ; Indexed mode (Subtract BX from word at DS:(SI+2))

not byte [bp+di] ; Base-indexed mode (Invert bits of byte at SS:(BP+DI))

add [bx+si+2], dx ; Base-indexed mode with dispacement (Add DX to word at

DS:(BX+SI+2))

The five addressing modes available are outlined more precisely for your reference below: Direct Mode: [constant]

constant: 16-bit unsigned value

Register-Indirect Mode: [register]

register: bx, si, or di

Note: bp technically isn't allowed. If used, assembler will generate [bp+0]

instead.

Base Mode: [constant + baseReg]

constant: 8-bit or 16-bit signed value

baseReg: bp or bx

Indexed Mode: [constant + indexReg]

constant: 8-bit or 16-bit signed value

indexReg: si or di

Base-Indexed Mode: [baseReg + indexReg]

baseReg: bp or bx

indexReg: si or di

Base-Indexed Mode with Displacement: [constant + baseReg + indexReg]

constant: 8-bit or 16-bit signed value

baseReg: bp or bx

indexReg: si or di

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SELF CHECK 3

“find the equivalent ASCII value of CHETTINAD” How will you transfer the string from one memory to other

Key Terms A ADDRESSING MODES OF 8086 2 Assembly Language13 B Based Addressing 6 D Direct Addressing 4 Data transfer 9 E Effective Address 17 I Immediate Addressing 3 Instruction set 9

M Memory Addressing 4 O Overrides 18 P Process control 12 R Register Indirect 5 S Segment 117

KEY TERM QUIZ 1.MOV AL,80 .ADDRESSING MODE? 2. MOV AL,[BX+80] .DDRESSING MODE?. 3. OVERFLOW FLAG is affected by addition operation? Yes/no 4. The flags used for multiply operation are___,____,____. . . . . 5. BX register is a __________ bit register? 6. CS ,DS,ES and SS are ________ bit registers. 7. CMPS is used for sting copy operation say yes/no 8. MOVBS is a string byte/word/double word operation. 9. The clock frequency of 8086 is______ 10.EI is used to enable only the hardware interrupts ..yes/no

MULTIPLE CHOICE

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1. The contents of different registers are given below. Form Effective addresses for different addressing modes

are as follow : Offset = 5000H

[AX]- 1000H, [BX]- 2000H, [SI]- 3000H, [DI]- 4000H, [BP]- 5000H,

[SP]- 6000H, [CS]- 0000H, [DS]- 1000H, [SS]- 2000H, [IP]- 7000H.

I. MOV AX, [5000H]

a) 5000H b) 15000H c) 10500H

II. MOV AX, [BX] [SI]

a) 13000H b) 15000H c) 12000H

III. MOV AX, 5000H [BX] [SI]

a) 20000H b) 1A000H c) 1A00H

2. The conditional branch instruction JNS performs the operations when if __

a) ZF =0 b) SF=0 c) PF=0 d) CF=0

3. Vector address of TRAP

a) 24H b) 36H c) 24 d) 18H

4. SOD pin can drive a D flip-flop?

a) SOD cannot drive any flip-flops.

b) SOD cannot drive D flip-flop, but can drive any other flop-flops.

c) Yes, SOD can drive D flop-flop.

d) No, SOD cannot drive any other flop-flops except D flop-flop.

5. IDIV and DIV instructions perform the same operations for?

a) Unsigned number

b) Signed number

c) Signed number & Unsigned number

d) none of above.

6. What is the output of the following code

AL=88 BCD, CL=49 BCD

ADD AL, CL

DAA

a) D7, CF=1

b) 37, CF=1

c) 73, CF=1

d) 7D, CF=1

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7. What is the output of the following code

AL= 49 BCD, BH= 72 BCD

SUB AL, BH

DAS

a) AL=D7, CF=1.

b) AL=7D, CF=1.

c) AL=77, CF=1

d) none of them.

8. What is the output of the following code

AL= -28 decimal, BL=59 decimal

IMUL BL

AX=? , MSB=?

a) AX= F98CH, MSB=1.

b) AX= 1652, MSB=1.

c) BX F9C8H, MSB=1.

d) BX= 1652, MSB=1.

9. What is the output of the following code

AL= 00110100 BL= 00111000

ADD AL, BL

AAA

a) AL = 6CH

b) 12H

c) 12

d) C6H

10. What is the addressing mode of add ax,bx

a) register

b) immediate

c) direct

d) indirect

Review Questions

2 MARKS

1. What is the difference between near and far procedure? 2. What is the difference between Macro and procedure? 3. What is the difference between instructions RET & IRET? 4. What is the difference between instructions MUL & IMUL? 5. What is the difference between instructions DIV & IDIV? 6. What is difference between shifts and rotate instructions? 7. Which are strings related instructions? 8. Which are addressing modes and their examples in 8086? 9. What does u mean by directives? 10. What does u mean by Prefix?

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11. What .model small means? 12. Difference between small, medium, tiny, huge? 13. What is dd, dw, db? 14. Interrupts in 8086 and there function. 15. What is the function of 01h of Int 21h? 16. What is the function of 02h of Int 21h? 17. What is the reset address of 8086? 18. What is the size of flag register in 8086? Explain all. 19. What is the difference between 08H and 01H functions of INT 21H? 20. Which is faster- Reading word size data whose starting address is at even or at odd address of

memory in 8086? 21. Which are the default segment base: offset pairs? 22. Can we use SP as offset address holder with CS? 23. Which are the base registers in 8086? 24. Which is the index registers in 8086? 25. What do u mean by assembler? 26. What do u mean by linker? 27. What do u mean by loader? 28. What do u mean by compiler? 29. What do u mean by emulator? 30. Stack related instruction? 31. .stack 100 means? 32. What is 20 dup (0)? 33. Which flags of 8086 are not present in 8085? 34. What is the size of flag register? 35. While accepting no. from user why u need to subtract 30 from that? 36. While displaying no. from user why u need to add 30 to that? 37. What are ASCII codes for nos. 0 to F? 38. How does U differentiate between positive and negative numbers? 39. What is range for these numbers? 40. Which no. representation system you have used? 41. What is LEA? 42. What is @data indicates in instruction- MOV ax, @data? 43. What is maximum size of the instruction in 8086? 44. Why we indicate FF as 0FF in program? 45. What is mul BX and div BX? Where result goes? 46. What is SI, DI and their functions? 47. Which are the pointers used in 8086 and their functions? 48. Which are string instructions? 49. In string operations which is by default string source pointer? 50. In string operations which is by default string destination pointer?

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Big Question 1. a. Explain the addressing modes of 8086 with the help of examples? (8)

b. Write short notes on macro? (4) 2. a. Explain the instruction set 8086? (6)

b. Write an ALP in 8086 to find sum of numbers in array? (6) 3. a. Explain the addressing modes of 8086 with the help of example? (8)

b. Describe the action taken by 8086 when NMI pin is activated? (4) 4. a. Explain memory organization in 8086? (4)

b. Explain the following assembler directives (8) i. ASSUME ii. EQU iii. DD IV. DW

5 a)Write an 8086 program to add,subtract,multiply two 16-bit numbers in CX and DX and store the result in location 0500H addressed by DI.(12) 6.Explain with example ,various addressing modes of 8086/88 microprocessor (12)66 7.a)Explain the use of following instructions:

-XLAT -DAA -CMPSB

b).difference between CALL and JMP instruction of 8086 microprocessor. 8.a. Describe any four assembler directives used in 8086 assembly language programming.

b. Write a program in 8086/8088 assembly language to convert string of character from uppercase to lowercase. Accept the string of length 8 characters from user. 9. Explain the various assembler directives used while defining the data segment of 8086/8088 microprocessor. 12 10.a. Differentiate between MACRO and PROCEDURE . 4

b.. Write a program in MASM-86 assembly language to convert a two digit BCD number into HEX. 8

EXAMPLE PROGRAMS

PROGRAM: 8BIT ADDITION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov al,num1

mov bl,num2

add al,bl

mov result,al

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int 3

mov ah,4ch

int 21h

org 20f0h

num1 db 03

num2 db 08

result db 00

end start

PROGRAM: 16BIT ADDITION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov ax,num1

mov bx,num2

add ax,bx

mov result,ax

int 3

mov ah,4ch

int 21h

org 20f0h

num1 dw 0ffffh

num2 dw 0ffffh

result dw 00

end start

PROGRAM: 8BIT SUBTRACTION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov al,num1

mov bl,num2

sub al,bl

mov result,al

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int 3

mov ah,4ch

int 21h

org 20f0h

num1 db 0ffh

num2 db 0aah

result db 00

end start

PROGRAM: 16BIT SUBTRACTION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov ax,num1

mov bx,num2

sub ax,bx

mov result,ax

int 3

mov ah,4ch

int 21h

org 20f0h

num1 dw 0ffffh

num2 dw 0eabch

result dw 00

end start

PROGRAM: 8BIT MULTIPLICATION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov al,num1

mov bl,num2

mul bl

mov result,al

mov result1,ah

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int 3

mov ah,4ch

Org 20f0h

num1 db 0ffh

num2 db 0aah

result db 00

result1 db 00

end start

PROGRAM: 16BIT MULTIPLICATION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov ax,num1

mov bx,num2

mul bx

mov result,ax

mov result1,dx

int 3

mov ah,4ch

int 21h

org 20f0h

num1 dw 0ffffh

num2 dw 0ffffh

result dw 00

result1 dw 00

end start

PROGRAM: 16BIT DIVISION .model tiny

.stack 32h

.code

org 2000h

start:

mov ax,cs

mov ds,ax

mov ax,00

mov dx,00

mov ax,num1

mov bx,num2

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div bx

mov Quotient,ax

mov remainder,dx

int 3

mov ah,4ch

int 21h

org 20f0h

num1 dw 0ffffh

num2 dw 0aaaah

Quotient dw 00

remainder dw 00

end start

PROGRAM: MULTY BYTE ADDITION .model tiny

data segment

dp1 dd 11223344h

dp2 dd 55667788h

res dd 00000000h

data ends

code segment

assume cs:code,ds:data

start: mov ax,data

mov ds,ax

mov si,offset dp1

mov di,offset dp2

mov bx,offset res

mov cx,03

sub ax,ax

mov al,[si]

mov dl,[di]

add al,dl

mov [bx],al

back:

inc si

inc di

inc bx

mov al,[si]

mov dl,[di]

adc al,dl

mov [bx],al

loop back

nop

mov ah,4ch

int 21h

code ends

end start

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PROGRAM: ASCII ADDITION .model tiny

data segment

ip1 db '9',0dh,0ah

ip2 db '6',0dh,0ah

res db 0

data ends

code segment

assume cs:code,ds:data

start: mov ax,data

mov ds,ax

xor ax,ax

mov al,ip1

add al,ip2

aaa

mov res,al

mov ah,4ch

int 21h

code ends

end start

PROGRAM: PACKED TO UNPACKED BCD .model tiny

data segment

bcdip db 56h

ubcdop dw 0

data ends

code segment

assume cs:code,ds:data

start: mov ax,data

mov ds,ax

xor ax,ax

mov al, bcdip

mov dl,al

and al,0f0h

mov cl,4

ror al,cl

mov bh,al

and dl,0fh

mov bl,dl

mov ubcdop,bx

mov ah,4ch

int 21h

code ends

end start

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PROGRAM: BCD to ASCII CONVERSION .model tiny

data segment

bcdip db 56h

ubcdop dw 0

data ends

code segment

assume cs:code,ds:data

start:

mov ax,data

mov ds,ax

xor ax,ax

mov al, bcdip

mov dl,al

and al,0f0h

mov cl,4

ror al,cl

mov bh,al

and dl,0fh

mov bl,dl

mov ubcdop,bx

add bx,3030h

mov ah,4ch

int 21h

code ends

end start

PROGRAM: BLOCK TRANSFER ;.model tiny

data segment

srcdata db 'Empty vessels make much noise',24h

data ends

extra segment

dstdata db 12 dup(0)

extra ends

code segment

assume cs:code,ds:data,es:extra

start:

mov ax,data

mov ds,ax

mov ax,extra

mov es,ax

mov si,offset srcdata

mov di,offset dstdata

cld

mov cx,29

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rep movsb

nop

mov ah,4ch

int 21h

code ends

end start