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BK TP.HCM 2010 dce Chapter 5 The 8051 Microcontroller Assembly Language Programming Faculty of Computer Science and Engineering Department of Computer Engineering

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Page 1: 8051 Assembly

BKTP.HCM

2010dce

Chapter 5The 8051 MicrocontrollerAssembly Language Programming

Faculty of Computer Science and EngineeringDepartment of Computer Engineering

Page 2: 8051 Assembly

2010dce

Introduction• CPU can work only in binary, a program that consists

of 0s and 1s is called machine language– Tedious, slow, prone to error

• Assembly languages provided mnemonics for themachine code instructions, plus other features– Low-level language, deal directly with the internal structure

of CPU (registers and the size of each, other details)– Assembler: a program is used to translate Assembly

language program into machine code• Today, high-level languages are used (Pascal, C, C++,

Java,…)– Compiler: translate program into machine code

©2010, CE Department - Logic Design 2 2

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Structure of Assembly Language• An Assembly language instruction includes:

– a mnemonic (abbreviation easy to remember)• The commands to the CPU, telling it what those to do with

those items– Optionally followed by one or two operands

• The data items being manipulated

• A given Assembly language program is a series ofstatements, or lines– Assembly language instructions

• Tell the CPU what to do– Directives (or pseudo-instructions)

• Give directions to the assembler

©2010, CE Department - Logic Design 2 3

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• An Assembly language instruction consists of 4 fields[label:] Mnemonic [operands] [;comment]

ORG 0H ;start(origin) at location 0MOV R5, #25H ;load 25H into R5MOV R7, #34H ;load 34H into R7MOV A, #0 ;load 0 into AADD A, R5 ;add contents of R5 to A

;now A = A + R5ADD A, R7 ;add contents of R7 to A

;now A = A + R7ADD A, #12H ;add to A value 12H

;now A = A + 12HHERE: SJMP HERE ;stay in this loop

END ;end of asm source file

Assembly Language Instruction

©2010, CE Department - Logic Design 2 4

The label field allowsthe program to refer to a

line of code by name

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• An Assembly language instruction consists of 4 fields[label:] Mnemonic [operands] [;comment]

ORG 0H ;start(origin) at location 0MOV R5, #25H ;load 25H into R5MOV R7, #34H ;load 34H into R7MOV A, #0 ;load 0 into AADD A, R5 ;add contents of R5 to A

;now A = A + R5ADD A, R7 ;add contents of R7 to A

;now A = A + R7ADD A, #12H ;add to A value 12H

;now A = A + 12HHERE: SJMP HERE ;stay in this loop

END ;end of asm source file

Assembly Language Instruction

©2010, CE Department - Logic Design 2 5

Mnemonics produceopcodes

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• An Assembly language instruction consists of 4 fields[label:] Mnemonic [operands] [;comment]

ORG 0H ;start(origin) at location 0MOV R5, #25H ;load 25H into R5MOV R7, #34H ;load 34H into R7MOV A, #0 ;load 0 into AADD A, R5 ;add contents of R5 to A

;now A = A + R5ADD A, R7 ;add contents of R7 to A

;now A = A + R7ADD A, #12H ;add to A value 12H

;now A = A + 12HHERE: SJMP HERE ;stay in this loop

END ;end of asm source file

Assembly Language Instruction

©2010, CE Department - Logic Design 2 6

Directives do notgenerate any machine

code and are usedonly by the assembler

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• An Assembly language instruction consists of 4 fields[label:] Mnemonic [operands] [;comment]

ORG 0H ;start(origin) at location 0MOV R5, #25H ;load 25H into R5MOV R7, #34H ;load 34H into R7MOV A, #0 ;load 0 into AADD A, R5 ;add contents of R5 to A

;now A = A + R5ADD A, R7 ;add contents of R7 to A

;now A = A + R7ADD A, #12H ;add to A value 12H

;now A = A + 12HHERE: SJMP HERE ;stay in this loop

END ;end of asm source file

Assembly Language Instruction

©2010, CE Department - Logic Design 2 7

Comments may be at the end of a line or on a line by themselves.

The assembler ignores comments.

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Assembling and Running an 8051 Program• The “obj” file

– Binary code and data for asource file

– Use by linker to create anexecutable program

• The “lst” (list) file, which isoptional, is very useful to theprogrammer– It lists all the opcodes and

addresses as well as errorsthat the assembler detected

– The “lst” file is used to find thesyntax errors or debug

©2010, CE Department - Logic Design 2 8

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List File• Example

1 0000 ORG 0H ;start(origin) at 02 0000 7D25 MOV R5, #25H ;load 25H into R53 0002 7F34 MOV R7, #34H ;load 34H into R74 0004 7400 MOV A, #0 ;load 0 into A5 0006 2D ADD A, R5 ;add contents of R5 to A

;now A = A + R56 0007 2F ADD A, R7 ;add contents of R7 to A

;now A = A + R77 0008 2412 ADD A, #12H ;add to A value 12H

;now A = A + 12H8 000A 80FE HERE: SJMP HERE ;stay in this loop9 000C END ;end of asm source file

©2010, CE Department - Logic Design 2 9

Address

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Program Counter (PC)• The program counter points to the address of the

next instruction to be executed– As the CPU fetches the opcode from the program ROM,

the program counter is increasing to point to the nextinstruction

• The program counter is 16 bits wide– This means that it can access program addresses 0000H

to FFFFH, a total of 64K bytes of code

©2010, CE Department - Logic Design 2 10

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Power Up• All 8051 members start at memory address 0000H

when they’re powered up– Program Counter has the value of 0000H– The first opcode is burned into ROM address 0000H, since

this is where the 8051 looks for the first instruction when itis booted

– We achieve this by the ORG statement in the sourceprogram

©2009, CE Department

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Placing Code in ROM

©2010, CE Department - Logic Design 2 12

1 0000 ORG 0H ;start(origin) at 02 0000 7D25 MOV R5, #25H ;load 25H into R53 0002 7F34 MOV R7, #34H ;load 34H into R74 0004 7400 MOV A, #0 ;load 0 into A5 0006 2D ADD A, R5 ;add contents of R5 to A

;now A = A + R56 0007 2F ADD A, R7 ;add contents of R7 to A

;now A = A + R77 0008 2412 ADD A, #12H ;add to A value 12H

;now A = A + 12H8 000A 80FE HERE: SJMP HERE ;stay in this loop9 000C END ;end of asm source file

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Data Type• 8051 microcontroller has only one data type - 8 bits

– The size of each register is also 8 bits– It is the job of the programmer to break down data larger

than 8 bits (00 to FFH, or 0 to 255 in decimal)– The data types can be positive or negative

©2009, CE Department

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Assembler directive• DB

– The DB directive is the most widely used data directive inthe assembler

– It is used to define the 8-bit data– When DB is used to define data, the numbers can be in

decimal, binary, hex, ASCII formats• ORG (origin)

– The ORG directive is used to indicate the beginning of theaddress

– The number that comes after ORG can be either in hexand decimal

– If the number is not followed by H, it is decimal and theassembler will convert it to hex

©2009, CE Department

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Assembler directiveORG 500HDATA1: DB 28 ;DECIMAL (1C in Hex)DATA2: DB 00110101B ;BINARY (35 in Hex)DATA3: DB 39H ;HEXORG 510HDATA4: DB “2591” ;ASCII NUMBERSORG 518HDATA6: DB “My name is Joe” ;ASCII CHARACTERS

©2009, CE Department

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Assembler directive• END

– This indicates to the assembler the end of the source(asm) file

– The END directive is the last line of an 8051 program– Mean that in the code anything after the END directive is

ignored by the assembler• EQU (equate)

– This is used to define a constant without occupying amemory locationCOUNT EQU 25... ....MOV R3, #COUNT

©2010, CE Department - Logic Design 2 16

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Rules for labels in Assembly language• Each label name must be unique

– Alphabetic letters, digits, special characters question mark(?), period (.), at (@), underline (_), dollar sign ($)

• First character must be an alphabetic character• Reserved words must not be used as labels

©2010, CE Department - Logic Design 2 17

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Registers• Registers are used to store information temporarily,

while the information could be– A byte of data to be processed– An address pointing to the data to be fetched

• The vast majority of 8051 register are 8-bit registers– There is only one data type, 8 bits– Any data larger than 8 bits must be broken into 8-bit

chunks before it is processed

©2010, CE Department - Logic Design 2 18

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Registers• The most widely used register

– A (accumulator)• For all arithmetic and logic instructions

– B, R0, R1, R2, R3, R4, R5, R6, R7– DPTR (data pointer), PC (program counter)

©2010, CE Department - Logic Design 2 19

16-bit Registers

8-bit Registers

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Program Status Word• The program status word (PSW) register, also

referred to as the flag register, is an 8 bit register– Only 6 bits are used

• These four are CY (carry), AC (auxiliary carry), P (parity),and OV (overflow)

– Conditional flags indicate some conditions that resulted after an instruction was executed

• The PSW3 and PSW4 are designed as RS0 and RS1, andare used to change the bank

– The two unused bits are user-definable

©2010, CE Department - Logic Design 2 20

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PSW Register

©2009, CE Department

signed number operation

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Instructions that affect flag bits

©2009, CE Department

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Ram Memory

©2010, CE Department - Logic Design 2 23

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Register Bank

©2010, CE Department - Logic Design 2 24

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Register Bank• Register bank 0 is the default when the 8051 is

powered up• We can switch to other banks by use of the PSW

register– Bits D4 and D3 of the PSW are used to select the desired

register bank– Use the bit-addressable instructions SETB and CLR to

access PSW.4 and PSW.3

©2010, CE Department - Logic Design 2 25

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Example• Example 1MOV R0, #99H ;load R0 with 99HMOV R1, #85H ;load R1 with 85H

• Example 2MOV 00, #99H ;RAM location 00H has 99HMOV 01, #85H ;RAM location 01H has 85H

• Example 3SETB PSW.4 ;select bank 2MOV R0, #99H ;RAM location 10H has 99HMOV R1, #85H ;RAM location 11H has 85H

©2010, CE Department - Logic Design 2 26

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Stack• The stack is a section of RAM used by the CPU to

store information temporarily– This information could be data or an address

• The register used to access the stack is called theSP (stack pointer) register– The stack pointer in the 8051 is only 8 bit wide, which

means that it can take value of 00 to FFH– When the 8051 is powered up, the SP register contains

value 07• RAM location 08H is the first location begin used for the

stack by the 8051

©2010, CE Department - Logic Design 2 27

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Stack• The storing of a CPU register in the stack is called a

PUSH– SP is pointing to the last used location of the stack– As we push data onto the stack, the SP is incremented

by one• This is different from many microprocessors (decremented)

• Loading the contents of the stack back into a CPUregister is called a POP– With every pop, the top byte of the stack is copied to the

register specified by the instruction and the stack pointer isdecremented once

• To push/pop the registers, we must use RAMaddress

©2010, CE Department - Logic Design 2 28

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Example 1MOV R6, #25HMOV R1, #12HMOV R4, #0F3HPUSH 6PUSH 1PUSH 4

©2010, CE Department - Logic Design 2 29

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Example 2POP 3 ; POP stack into R3POP 5 ; POP stack into R5POP 2 ; POP stack into R2

©2010, CE Department - Logic Design 2 30

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MOV InstructionMOV destination, source ;copy source to dest

©2010, CE Department - Logic Design 2 31

MOV A, #55H ; load value 55H into reg. AMOV R0, A ; copy contents of A into R0

; (now A=R0=55H)MOV R1, A ; copy contents of A into R1

; (now A=R0=R1=55H)MOV R2, A ; copy contents of A into R2

; (now A=R0=R1=R2=55H)MOV R3, #95H ; load value 95H into R3

; (now R3=95#)MOV A, R3 ; copy contents of R3 into A

; (now A=R3=95#)

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• Value (proceeded with #) can be loaded directly toregisters A, B or R0 – R7

MOV A, #23HMOV R5,#0F9H

• If values 0 to F moved into an 8-bit register, the rest ofthe bits are assumed all zeros

MOV A, #5 ; A = 05H = 00000101B

• Moving a value that is too large into a register willcause an error

MOV A, #7F2H ; ILLEGAL: 72FH > 8 bits(FFH)

Notes on Programming

©2010, CE Department - Logic Design 2 32

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ADD InstructionADD A, source ;ADD the source operand to the

;Accumulator

– Source operand can be either a register or immediate data, but the

– Destination must always be register A– “ADD R4, A” and “ADD R2, #12H” are invalid since A must

be the destination of any arithmetic operation

MOV A,#25H ;load 25H into AMOV R2,#34H ;load 34H into R2ADD A,R2 ;add R2 to Accumulator (A = A + R2)MOV A,#25H ;load one operand into A (A=25H)ADD A,#34H ;add the second operand 34H to A

©2010, CE Department - Logic Design 2 33

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ADD Instruction and PSW• ADD instruction impacts on CY, AC, P and OV flag

bits of the PSW register• Example 1:

MOV A, #38HADD A, #2FH

38 00111000+ 2F + 00101111

67 01100111CY = 0 since there is no carry beyond the D7 bitAC = 1 since there is a carry from the D3 to the D4 bitP = 1 since the A has an odd number of 1s (it has five 1s)

©2010, CE Department - Logic Design 2 34

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ADD Instruction and PSW• Example 2:

MOV A, #9CH

ADD A, #64H

9C 10011100+ 64 + 01100100100 00000000

CY = 1 since there is no carry beyond the D7 bitAC = 1 since there is a carry from the D3 to the D4 bitP = 0 since the A has an even number of 1s (it has five 1s)

©2010, CE Department - Logic Design 2 35

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ADD Instruction and PSW• Example 3:

MOV A, #88H

ADD A, #93H

88 10001000+ 93 + 1001001111B 00011011

CY = 1 since there is no carry beyond the D7 bitAC = 0 since there is a carry from the D3 to the D4 bitP = 0 since the A has an even number of 1s (it has five 1s)

©2010, CE Department - Logic Design 2 36

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Looping• Repeating a sequence of instructions a certain

number of times is called a loop– Loop action is performed by

• DJNZ reg, Label– The register is decremented one– If it is not zero, it jumps to the target address

referred to by the label– Prior to the start of loop the register is loaded with

the counter for the number of repetitions– reg can be R0 – R7 or RAM location

©2010, CE Department - Logic Design 2 37

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LoopingMOV A, #0 ;A=0, clear ACCMOV R2, #10 ;load counter R2=10

AGAIN:ADD A, #03 ;add 03 to ACCDJNZ R2, AGAIN ;repeat until R2=0,10 timesMOV R5, A ;save A in R5

• This program adds value 3 to the Acc ten times• How many times this loop can be repeated?

©2010, CE Department - Logic Design 2 38

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Nested LoopMOV A, #55H ;A=55HMOV R3, #10 ;R3=10, outer loop count

NEXT:MOV R2, #70 ;R2=70, inner loop count

AGAIN:CPL A ;complement A registerDJNZ R2, AGAIN ;repeat it 70 timesDJNZ R3, NEXT

©2010, CE Department - Logic Design 2 39

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8051 Conditional Jump Instructions

• CJNE operand1, operand2, reladdr©2010, CE Department - Logic Design 2 40

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Conditional jumps• All conditional jumps are short jumps

– The address of the target must within -128 to +127 bytesof the contents of PC

©2010, CE Department - Logic Design 2 41

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Unconditional jumps• LJMP (long jump)

– 3-byte instruction• First byte is the opcode• Second and third bytes represent the 16-bit target address

– Any memory location from 0000 to FFFFH

• SJMP (short jump)– 2-byte instruction

• First byte is the opcode• Second byte is the relative target address – 00 to FFH

(forward +127 and backward -128 bytes from the current PC)

©2010, CE Department - Logic Design 2 42

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CALL• CALL is used to call a subroutine.• Subroutines are often used to perform tasks that

need to be performed frequently.• This makes a program more structured in addition to

saving memory space.• There are two instructions : LCALL (long call) and

ACALL (absolute call).• Deciding which one to use depends on the target

address.

©2010, CE Department - Logic Design 2 43

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CALL• LCALL (long call)

– 3-byte instruction– The first byte is the opcode– The second and third bytes are used for the address of the

target subroutine– LCALL can be used to call subroutines located anywhere

within the 64K-byte address space of the 8051• ACALL (absolute call)

– 2-byte instruction– 11 bits are used for address within 2K-byte range

©2010, CE Department - Logic Design 2 44

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Addressing Modes• Immediate• Register• Direct• Indirect• Relative• Absolute• Long• Indexed

©2010, CE Department - Logic Design 2 45

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Immediate Addressing Mode• The source operand is a constant

– The immediate data must be preceded by the “#” sign– Can load information into registers, including 16-bit DPTR

register• DPTR can also be accessed as two 8-bit registers (HIGH

byte DPH and LOW byte DPL)

MOV A, #25H ; load 25H into AMOV R4, #62 ; load 62 into R4MOV B, #40H ; load 40H into BMOV DPTR, #4521H ; DPTR=4521HMOV DPL, #21H ; this is the sameMOV DPH, #45H ; as above

©2010, CE Department - Logic Design 2 46

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Immediate Addressing Mode• Use EQU directive to access immediate data

COUNT EQU 30... ...MOV R4, #COUNT ;R4=1EHMOV DPTR, #MYDATA ;DPTR=200HORG 200H

MYDATA: DB “America”

• Use immediate addressing mode to send data to8051 ports

MOV P1, #55H

©2010, CE Department - Logic Design 2 47

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Register Addressing Mode• Use registers to hold the data to be manipulated (A,

B, R0 – R7)• The source and destination registers must match in

sizeMOV DPTR, A ; ErrorMOV R7, DPLMOV R6, DPH

• The movement of data between Rn registers is notallowed

©2010, CE Department - Logic Design 2 48

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Direct Addressing Mode• Specify the operand by giving its actual memory

address or its abbreviated name (P1, P2, ...)• Use to access SFR (Special Function Register)

MOV A, P1MOV A, 020H ; content of RAM at

; location 020H A

©2010, CE Department - Logic Design 2 49

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Indirect Addressing Mode• Use a pointer to hold the effective address of the

operand• Only use R0, R1 and DPTR registers can be used as

pointer registersMOV @R0, A ; Store content of

; reg. A into location; pointed to by the; content of reg. R0

MOV A, @DPTR ; Memory location pointed; to by DPTR

©2010, CE Department - Logic Design 2 50

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Relative Addressing• Used with some type of jump instructions• A relative address (offset) is an 8-bit signed value

– The range for jumping is -128 to +127 locations– The value is added to the PC to form the address of the

next instruction executed (assembler task)• Provide position-independent code

Loopback: DEC AJNZ Loopback ; If A is not zero,

; Loopback

©2010, CE Department - Logic Design 2 51

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Absolute Addressing Mode• Absolute Addressing

– Used only with the ACALL and AJMP instructions– 11-bit absolute address is specified as the operand (2K

byte page)ACALL PORT_INIT...

PORT_INIT: MOV P0, #0FH ; subroutine

• Long Addressing Mode– Used with the LCALL and LJMP– 16-bit destination location (64K)

©2010, CE Department - Logic Design 2 52

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Indexed Addressing Mode• Useful when there is a need to retrieve data from a

look-up table• Use 16-bit register (data pointer) holds the base

address, Accumulator holds an 8-bit displacement(index value)

• Used with JMP or MOVC instructionsMOV A, #08H ;offsetMOV DPTR, #01F00H ;table start addressMOVC A, @A+DPTR ;gets value from table

;start address + offset

©2010, CE Department - Logic Design 2 53

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Instruction Types• Five groups

– Arithmetic operations– Logical operations– Data transfer operations– Boolean variable operations– Program branching operations

©2010, CE Department - Logic Design 2 54

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Reference• “The 8051 Microcontroller and Embedded Systems

Using Assembly and C – 2nd” - Muhammad AliMazidi, Janice Gillispie Mazidi, Rolin D.McKinlay

• “The 8051 Microcontroller - 2nd” - I. Scott Mackenzie,Prentice-Hall 1995

©2010, CE Department - Logic Design 2