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Ed

gar

S

nc

hez

-Si

nenc

io

T

e

x

a

S

A

&

M

U

n

i

v

e

s

i

t

y

[email protected]

COMMON-MODEFEEDBACK

TECHNIQUES:ATUTOR

IAL

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Why do we need to use Common-Mode Feedback Circuits ?

In the past, circuits have mainly one input and one output and bothreferred to ground.

Low voltage power supply make single ended circuits very difficultto perform optimally. An alternative to single-ended circuits is touse fully differential circuits.

To double the output swing a fully differential circuit are used. The output terminals of fully differential circuits are equal andopposite polarity.

Additional properties of fully differential circuits are: improved

output swing, linearity and common-mode rejection ratio. How are the differential outputs referred to ?

How are the common-mode signals eliminated in a Fully differential

circuit ?

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A CMFB circuit, in a fully differential circuit, isgenerally needed for two reasons:

(1) To control the common mode voltage at different nodes

that cannot be stabilized by the negative differentialfeedback. This is usually chosen as a reference voltage

yielding maximum differential voltage gain and/or

maximum output voltage swing

(2) To suppress the common mode components, that tends

to saturate different stages, through applying common

mode negative feedback.

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Background and motivation .

Vo1 = VDD - IDR

Vb

Vin

Vo1M2

M1

VSS=0

VDD

Vin

Vo1R

M1

VSS=0

VDD

ID

Can we determine the DC operating points for Vo1 and Vo2?

Let us first consider the case of one transistor and one resistor.

Vo1

VinM1OFF

M1 ohmic

M1saturation

Vo1 = Vin - VT1

ID1VDDR

omhicsaturation

VGS2VGS1

VDSVDDVo2

VGSn

Analog and Mixed-Signal Center

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ID1 M1 triode M1 saturationVGS1 = VIB

VGS1 = VIA

VDSVDDVo2B

P1

P2

VDD - VSGVDD - (VSG - |Vtp|)For VSS 0

Vo1

VI

I II III IV

P1

P2

VDDVDD - (VSG -|Vtp|)

Vo1B

I M1 cutoffII M1 sat, M2 triode

III M1 sat, M2 satIV M1 triode, M2 sat

( ) ( )( ) ( ) ( )[ ]0122

201

2

1

1 12

12 21

VVVVVL

WKVVVVV

L

WKDDpTbDD

pSSNTin

NSS

+

=+

KCL

21 DDII =

Small variations due to process (or to the input) could force the operations in III tomove to regions II or IV.

V01 is difficult to fix and the regions of operation of M1 and M2 are very sensitiveto process variations and input variations.

Analog and Mixed-Signal Center (AMSC)

Second case: Two transistors one n- type and one p- type

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Ip

In

Ip - Inrop

ron

Vo ro = rop // ron

What is the effect of mismatch between the p-type currentsource and the n-type current source?

Vo due to the transistor mismatches, in ID1 and ID2 , isgiven by

Vo=(I

p- I

n) r

o= IR

o

For instance for =15 and ro = 266 k, this results inVo = 4V. Since this error can not be produced M2 is forcedinto triode region.We will study techniques to make I close to zero.


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Vb

Vo- +M1 M1

M2M2

Vin+ Vin-

ISS

VDD

ISS

M1 M1Vin+ Vin-

Vo- +

RD RD

VDD

Vin Vo

-

+

+

-

How is the common source amplifier related to common-modefeedback?

Fully differential (FD) circuits need common-mode feedback tooperate properly and to fix the DC of the output nodes.

FD amplifiers consist of common source circuits embeddedin differential pairs. Thus, the properties of the single-inputcommon source circuits are part of the FD amplifiers.


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M3

- +VoVin

+ Vin-

P- P+

VDD

M2M2

M1 M1

Vb

ISSVb2

In a number of applications the inputs and output are short circuited, i.e.,

From previous slide, for the load resistor RD, theinput and output common-mode levels is well defined

2/RIVV DSSDDcm,o =

For the case of a current source load implemented by PMOStransistors M2 and M2 the common-mode level is not well

defined. CM Levels depend on how close IDM2 and IDM2

are to ISS/2.

In practice ISS is implemented by a NMOS currentsource, and similarly for M2 and M2 by means

of a PMOS current source.

These two current sources are not ideal creating afinite error between ID, M2, M2 and ISS/2.

Vin Vo

-

+

+

-

Reference.-J.F. Duque-Carrillo, Control of the Common-Mode Component in CMOS Continuous-Time Fully DifferentialSignal Processing, Analog Integrated and Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993

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Also if drain currents of M2 and M2 are slightly greater thanISS/2 then both M2 and M2 must enter into the triode region, so

that their drain currents remain ISS/2.Analog and Mixed-Signal Center (AMSC)

Suppose that the drain currents of M2 and M2 (in the saturation

region) are slightly smaller than ISS/2, to satisfy KVL at nodes P- andP+, then Vp- and Vp+ must drop forcing M3 to enter in triode region,producing only 2IDM2, DM2.

Effects of drain current mismatches on the DC outputvoltage: An example of a FD resistor equivalent:

VDD

- +Vo

P- P+

M2M2

M1 M1

ISSM3

MB2

MB3

Rb

WL

WL

2

WL

WL

++-

-

P-

P+

Vo

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The high impedance nodes are difficult to fix their DC operating

points. This is the case of Single-Ended Differential Amplifiers(Op Amps and OTAs).

Op Amps in open loop yieldVDD

Vo = or-VSS

Fortunately, Linear Applications of single ended circuits are based onnegative feedback, and this feedback circuitry also fixes the DCoperating point, i.e.,

Vo

= A (0 - V-)

butand

Vo,dc = 0for symmetric power supplies.

21

1o

RR

RVV

+=

Closed-Loop Negative Feedback

R1

Vo

R2

-A

+V-

Closed loop negative feedback effects on the DC output voltage

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Vo,dm = Vo+ - Vo- = A (V+ - V-)

Therefore Vo,dm = 0 if V+ = V- (well defined)But

Vo,cm = 1/2 (Vo+ + Vo-) = ? (undefined)

Where should the value of Vo,cm be set? Determined?

21

1dm,odm,o

RR

RAVV

+=

OutputVo

+

Vo-

V+

- V-

SlewRegion

SlewRegion

LinearRegion

I/0 characteristics of a FD Amplifier.

This is the region where

Vo,cm must be fixed. Yielding

maximum output voltage

swing and (maximum)differential voltage gain.

I/0 characteristics of a FD Amplifier.

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Vo,cm is usually fixed by an additional negative (common-mode) feedbackcircuit such that the differential voltage gain is maximized.

Fully

DifferentialAmplifier

CM (H2)LevelSenseCircuit

CM Detector

ReferenceVoltage

+

-

Vcorrection

H3

VCMC

(H1)Vin-

Vin+ Vo+

Vo-

Basic Operations Sensing the output CM level,

i.e.,

cm,ooo V

2

VV=

+ +

Comparison with a voltagereference i.e.,

refcm,o VV Injecting the error correct-

ing level to the amplifier bias

circuitry.

Avoid injection of CM signalsto nodes of the amplifierwhich do not correct theV

o,cm.

Conceptual Architecture ofCommon-Mode Feedback

Stability requires to have negativefeedback:

PHASE (H1H2H3) < 135 FOR < u


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If the output signals are current signals, the CMF architecturecould be represented as follows:

A conceptual current mode implementation of Level SenseCircuit, CM Sense Current Amplifier (Comparator)

CMSenseCurrentAmp

FullyDifferential

Amplifier

TransconductanceLevel Sense Circuit

Iref

+

-

ICMCVin

-

Vin+ Vo+

Vo-

-+

-+

Icmc

MY MX

Iref

MY MX

Vo+io+

Vo-io-

icm

CM Sense Current Amp

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CM Detector 2

Performance Observations

R1 R2

Vo+Vo-

VSIB1 IB2

Vo+Vo-

VS

11 =

B

B

B

B

IR

II

RR

IR

R

22

442

8

1

42

+

+++

=

2

22

2

2

8

1

+

++

B

B

B

B

BT

B

IRI

I

I

IV

I

23

22

1

8

1

2

1

+

=

B

BB

IR

II

B

T

I

V

+

=

442

11 =

BI

8

13 =

High DC offset due to sourcefollowers Other buffers can be used toreduce the DC offset Mismatching between thepassive resistors is the dominanterror in 2

High DC offset Highly non-linear CM signaldetector

CM Detector 3

J.F. Duque-Carrillo, Control of the Common-Mode Component in CMOS

Continuous-Time Fully Differential Signal Processing, Analog Integratedand Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993

dmodmocmoSvvvV

,3,2,1 ++=

CM signal detectors : two conventional cases

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CMdetector

2

To gatesof M1A-

M1B

STRUCTURE*

DCA

DM

CM

DM

CM

GBW

GBW

A

A=

100KHz@1

THD

ppV

mean=8.2 dB=11.1 dBWC=21 dB

1.1 0.05 %

mean=20 dB=9.5 dB

WC=33.7 dB

mean=22.1 dB=9.6 dB

WC=36.2 dB

1.2

1.3

0.22 %

0.06 %

Amplifier performance with CM control by current steering.

1.2 0.015 %mean=9.4 dB=8.5 dB

WC=23 dB

Vre fVoVo

+

-

VoVo

CMdetector

3

To gatesof M1A-

M1BVre f

+

-

To gatesof M1A-

M1BVre f

Vo Vo+ -

Vbias

To gatesof M1A-

M1B

Vre f

VoVo+

-

Vbias

Low-distortion CM steering loop.

Togates

of M1A-M1B

VrefVo+ Vo

-

Vbias

Vi+

VDD

Vo+

VSS

Vbias1

Vbias2

Vbias3

Vbias4

M1B

M2B

M3B

M4BM4A

M3A

M2A

M1A

Vo-Vi-

MBMA

M4C Vbias5

A folded amplifier as anexample of a FD amplifier

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Example of a compensated Op Amp and a CM sense circuit

VDD

M10 M5

-VSS

M9

Vo2

M4

VB2

C

M3

M7

M6

C

VB1V

B1

M2M1Vi1 Vi2

M25

VCMC

M22M21

Vo1

VB3M26

M24M23

VB3M27

VCM

ICMS

op amp CM sense

+ -

- +

Vi1

Vi2

Vo1

Vo2

-

+Vcm

-

+Vcm

VCMC

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A common mode feedforward circuit is a circuit sensingthe input voltage. Then this input common-mode current isadded at each of the two output terminals (or applied toan internal node of the amplifier) with the purpose tocancel the output common-mode current component.Next we consider two examples, one with a BiCMOS OTAimplementation and another one with a fully balancedfully symmetric CMOS OTA.

We will discuss the advantages and limitations of thisfeed-forward versus the common-mode feedback.

What is a common-mode feed-forwardcorrection circuit ?

Cancellation of the output common mode current signal

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+in

V

0ICV

1M

+0I

1M2M 2M

biasV

inV

L

W

L

W

L2

W

(b)

Pseudodifferential BiCMOS transconductor with feedforward common- modecancellation. (a) Conceptual idea. (b) BiCMOS implementation.

[*] F. Rezzi, A. Baschiroto, and R. Castello, A 3V 12-55 MHz BiCMOS Pseudo Differential Continuous-TimeFilter, IEEE Trans. Circuits Systems I, vol. 42, pp 896-903, November 1995.

cmmcC VgI =

+d,C

I

(a)

+in

V

inV

dmg

cmg

d,CI

CI

+0I0I

gmd = gmc

2/incmin VVV +=+2/incmin VVV =

( )2/incmmdd,C VVgI +=+

( )2/incmmdd,C VVgI =

2/inmdCd,C0 VgIII ==++

2/inmdCd,C0 VgIII ==

Cancellation of the output common mode current signal

Note that the output of has two identical current copiescmg

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Let us explore how a common-mode feedforward can be sensed and thenapplied. Consider a fully differential OTA with two current-mirrors

Correcting signal can be voltage or current. Note that Io+,andIo

- areequal to gmDRIVER (Vin+- Vin-) and gmDRIVER( Vin- -Vin+) , respectively. That is, weare sensing the input voltage. We are not sensing the output voltage. aIo+ and aIo- are copies of Io+ and Io-, respectively. In practice the value

of aIo is a = 1 or a = 1/2.

FD OTA

Vo-

Vin+ Vin

-

Vo+

Io- Io

-

IbiasIbias CM

SenseAmp

correctingsignal

VcmaIo

+

aIo-

Iref

Icmlevel sensing

circuit

Itail

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FD OTA CMFF (current-mode)

OTA FD CMFF Implementation (Self-Bias) We can eliminate Iref and still keep a good CMRR

and to increase the current through M1 if is needed.

M4

MX

M3

MY

Vo+

M4

MX

Vin- Vin+

M3

Vo-

M2M2

MY

M1 M1

Mref

Iref

io- io+

VREF


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Observe that only one CMFB circuit is needed per output.

If the Amp 1 is connected with a CMFB, any other amplifier connectedto this amplifier does not need the extra CMFB.

Furthermore, in some architectures the CM detector is a feedforwardand forms part of the amplifier. An example of this type has beendiscussed before i.e., the Fully Balanced 4 current-mirror OTA

Vo+

Vo-

Vo+, previous = Vin

+

Vo-, previous = Vin

-

Complete Amplifier 2

Common-Mode

FeedforwardDetector

Amplifier

Vin1+

Vin1-

Complete Amplifier 1

Common-Mode

FeedforwardDetector

Amplifier

Vcm

Common feedback of more than one amplifier and their interconnections

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M8

Vref

Vo+

VCMFB

M7 M5

Io1

2

21 II 2

21 II +

M6 M4

I1 I1 I1

M3 V1 M2

M1

VDD

Vx

Vref

Vo-

VCMFB

M7M5

Io2

212 II

221 II +

M8M6M4

I2I2I2

M3V2M2

M1 vin-vin+

(from next stage)

2

1

m

m

g

g

3mg

V1 I1

+

Vin+

2

1

m

m

g

g

3mg

V2 I2Vin-

42

1m

g

6mg Io1

6mg Io2

Vx=Vcm

-

-+

+5m

g

5mg

NEXT OTA IS DETECTING THE COMMON MODE FROM THIS OTA AND

FEEDING BACK TO THIS OTA

Block Diagram Representation

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Common-Mode Rejection Ratio (CMRR):a) CMFF b) CMFB c) CMFB & CMFF

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Transient Response

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Total Harmonic Distortion(Single-ended)

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Total Harmonic Distortion(Double-ended)

COMMON MODE FEEDBACK AMPLIFIERS

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COMMON-MODE FEEDBACK AMPLIFIERS:Characterization and Simulation

Ideal Response

2

1

; 1,1 == cmos vvTaking into account mismatches on the

Amplifiers H1 and Hi yields:

2

,3,2,1 dmodmocmosvvvv ++=

'1H

CM

Detector

+

+

+

+

-

-

Merged Amplifiers

+iViV

REFV

SV

+oV

oV

2H

'

1

H

1H

..

Fully Differential Amplifier

With Common-Mode Feedback

Analog and Mixed-Signal Center TAMU (ESS)

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Let assume the linearized ideal case .0and,0 2031 = Note here that the notation is changed to DSCS AA == 21 ,

ADD

.

Vi,dm

Vi,cm

ADC

ACD

ACC

vs

ASDADS

ACSASC Vo,cm

Vo,dm

SDSDM

SDCSCM

DSSDDM

CSSCCM

AALG

AALG

AALG

AALG

==

==

DMCM LGLGD = 1

Using MASONs Rule

( )

( )

CDCD

CS

DSDDDC

DMCDDMCCCC

DDCMDCCMDD

DD

AA

A

AAA

D

LGALGAA

AD

LGALGAA

+=

+

=

effective,

effective,

effective,

effective,

1

1

T i i h li ff 0d00

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To investigate the non-linear effects, assume .0and0,0 231 = ThusThe following expressions can be approximated.

CSdmocmoCSs

sSCdmoDCdmi

mDCcmo

SDdmoDDdmimDDdmo

AvvAv

vAvfAvgAv

vAvfAvgAv

=+

+=

+=

1,3,

,,

,

2,,,

;

where

It can be shown that:

gm FD withCMFB

f

dmiv ,

tvv idmi cos, =

dmov ,

cmov ,

DDexDMm

CL

exDMCM

CLSDi

exDMCM

CLSD

AfLGf

gA

LGLGAAHDV

LGLGAAHD

==

,

2,

2

222

33;

,

32

;

21

21


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Fully DifferentialAmplifier

+inV

inV

++

-

+oV

oV

+

+

Common-

Mode

Detector

ocmv

2H

3HCMV=REFV

+

-

-

1H

CMCcontrolCM, vv =

( )CMOCM Vv

COMMON-MODE FEEDBACK LOOP

Negative Feedback, 1321

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'1H is defined as the gain between input vCMC and the output )+ oo VV

i.e. two examples

VFIX determines the current for

vCMC = 0.

Inherent CM detector

?GSOCM Vv

A Simple Fully-Differential Op Amp

A Simplified Folded-Cascode Fully Differential Op Amp

DDV

+oV

oV

inv

FIXV

SSVCMCv

+inv

biasV

DDV

SSV

2biasV

1biasV

3biasV

+oV

+

iv

OCMv iv

oV

2biasV

3biasV

CMCVv

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STABILITY REMARKS

The poles of the common-mode feedback are given by the open loop gain

)()()( 32'1 sHsHsH

The bandwidth of the common-mode gain and the differential-mode gain.

For differential inputs in an ideal amplifier

Differential-Mode.

How to simulate this D-M?

Common-Mode

2

1i.e.

1 232'1

1 =+

= HHHH

HH CM

CM+ +

- -

CM

Detector

refV

icmv

1H2H

3H

+-

iHcmo

V

2indv

+ +- -

2indv

+oV

oV

CMDetector

+-

refV

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How to check stability of this loop?

+ +

- -

CM

Detector

ocm

V

+ocm

VL

L

+-

.

cmiv

,

.

.

refV

+

-


How to use a Common Feedback Circuit to

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How to use a Common Feedback Circuit toyield a very LV rail-to-rail Amplifier?

( )cm,p,irefp,ip,irefx VVA2]VVV2[AV =+=+

AGR2VV

2VVV

m

cm,iref

p,ip,icm,p,i ++=

+

2

VVV;VV iicm,idm,idm,p,i

+ +==

I/VG xm =

Very LV operational amplifier based on a singledifferential pair with an input CM adapter.

Conceptual circuit schematic for illustratingthe operation of the input CM adapter.

How does it operate?

where

Vi,dm is the DM component of the input

Vi,p,dm is the DM component of the output

RVref

A- - + +

Vi+

I

I

R

Vi-

I

I

Vi,p-Vi,p

+

VDDVx

VDD

Vbias

RM Vout

CMAdapter

Vi-

Vi+

CM

Vi,p+

Vi,p-

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Implementation of the error amplifier

Vref Vref

IT

Vi,p+ Vi,p-

IT

VDD

Vx

CL

- - + +

Vx

VrefVi,p

-Vi,p+

CL

A

One possible implementation of the input

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One possible implementation of the inputCM adapter follows

Fig 3. Circuit implementation of the input CM adapter in Fig 2.

Stability conditions must be established in designing this circuit.

Main Transistor Aspect Ratios (in m) andElement Values of the AmplifierBased on a Single Input Pair (Fig 3).

1000/6600/450/2

300/4

150/2200/2400/2

M1A, M1BM2A, M2BMA1 - MA4MA5, MA6

M2DM1, M2

M3 - M5

M6M7 - M10

M11R1 - R2

RMCM

IB = IT/2

1600/2300/4700/215 k

5 k5 pF

10 AMA1

VDD

M2D

MA6

R2

M2CM2B

Vi-M1B

Vi,p-

MA2

MA5

R1

M2A

Vi+M1A

Vi,p+

IT

IT

MA4MA3

VxCL

Vref

R Vref

A

- - + +

Vi+

I

I

R

Vi-

I

I

Vi,p-Vi,p+

VDDVx

J.F. Duque-Carillo, J.L. Ausin, G. Torelli, J.M. Valverde and M.A. Dominguez, 1-V Rail-to-Rail Operational Amplifiers inStandard CMOS Technology, IEEE Journal Solid-State Circuits, Vol. 35, No. 1, pp. 33-44, Jan. 2000.

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Input CM Adapter

Input CM voltage and shifted CM voltage

CM input voltage

Shifted CM input voltage Vi,p+ and Vi,p-

CM input voltage

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Very LV Op Amp based on CM Adapter

Pros

The amp could work as low as 1V for conventional CMOStechnology

The DC gain and unity gain frequency are not much affected bythe extra circuitry

Cons Power consumption, input DC offset voltage and current, and input

referred noise are increased due to the resistive dynamic voltageshifter

Input resistance is in the order of output resistance of a MOStransistor instead of infinity compared with conventional CMOSamplifier

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DC Sweep

Input output DC characteristic

( including the DC adapter )

DC gain = 75.13 dB

VDD

M5M4

M7 M8

M6Vbias

RM Vout

M11M10M9

M2M1CM

AdapterVi-

Vi+

CM

Vi,p+

Vi,p-

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Phase Margin

Frequency Response - Phase ( including the DC adapter )

Phase Margin = 59.56 degree

LV Common Mode Feedback Techniques

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Vi +Vi

VDD

VBIAS1

VBIAS2

A simple PMOS input stage

+

ICMFB Vo

Vi

Vref,i

Rail-to-rail very LV amplifier in unity-gain

configuration with input common-mode

feedback (ICMFB)

+ICMFBVref,i

+

OCMFB Vref,o

Vo+

Vo

R2

R2

R1

R1

Vin+

Vin-

Vx -

+Vx

-

V-

V

+

FD LV rail-to-rail amplifier with

ICMFB and OCMFB

VDD

++

Vref,i

Is

Is

Rs

Rs

Is

Is

+

+

Vx+

Vx

-

V-

V+

ICMFB (shadowed area) for rail-to-rail LV

amplifier operation

LV Common-Mode Feedback Techniques

LV CMFB FOR OTAS VDD

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LV CMFB FOR OTAS

Typical OTA connection in

fully differential OTA-C

based circuits.

The common-mode voltage

is obtained from the input of

the following stage. Poor

PSRR

Pseudo-differential OTAs including the

CMFB for the first one with good PSRR

IB

IBIB

IB IB

IBIB

IB

VDD

VSS

IB

GND

MC M1R1 R1

M1

Vin+Vin-

Vo

IB

IB

VB1

IBIB

VREFIB IB

IBIB

IB

+-

VB2

VDD

VSS

VC

Vin+ Vin-

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Final Remarks

DC operating points for high impedances are difficult tofix

Fully differential amplifiers with high output impedancenodes must use common-mode feedback circuits .

Common mode circuits can fix the DC operating points aswell as eliminate the common mode output component.

Low voltage constraints impose optimal bias conditions atboth the input and output ports of an amplifier.

Common mode circuits for LV should be used both at theinput and output

607 cmfb-feb2005

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