241-440 by W.S.@2009

241-440 Computer Syste

mDesign 1Lecture

Wannarat Suntiamorntut

wannarat@coe.psu.ac.th

241-440 by W.S.@2009

OverviewComputer Organization & Design Both in Hardware/Software Interface Learning by Evolution Based on RISC processor (MIPS)

241-440 by W.S.@2009

Course Structure Lectures

* 1-wk, Introduction Technology

* 3-wk, The role of Performance and ISA

* 2-wk, Arithmetic for computer

* 5-wk, Processor Design

* 2-wk, Pipeline

* 2-wk, Memory

* 2-wk, Interfacing and peripheral

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Course Administration Instructor : Wannarat Suntiamorntut Office hours : Mon. - Fri. 09:00 - 16:30 Material : http://lms.psu.ac.th

Text : Computer Organization & Design :

Hardware/Software Interface.

2nd Edition : Petterson and Hennessy

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Grading Assignment 30 %

Simple processor Design based on MIPs Midterm 30 % Final 30 % Class attendant 10%

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Course Problem You are late assignment. You Do not understand and Do not find out the

answers. Realize that you are a STUDENT, find out the i

nformation and knowledge. Plan and management your time carefully.

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Acknowledgement Petterson and Hennessy , Computer Or

ganization and Design : Hardware/S oftware Interface.

Slide Material from Morgan KaufmannPublisher.

Prof. Bob Broderson , Berkeley U. Prof. V. Heuring, and H. Jordan Prof. Arvind, & Krste Asanovic, MIT

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Level of Representationtemp = v[k];v[k] = v[k+1];v[k+1] = temp;

lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)

Assembler

0000 0000 1010 0001 0000 0000 0001 10000000 0000 1000 1110 0001 1000 0010 00011000 1100 0110 0010 0000 0000 0000 0000...

Compiler

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Hardware / Software

SoftwareSoftware

HardwareHardware Instruction Set

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Example ISA Digital Alpha 1 3(V ,V ) -199297

-HP PA RISC 11 20(V . ,V . )-198696

Sun Sparc ( 8, 9)V V -198795

SGI MIPS (MIPS I,II,III -198696

IV,V)Intel 8086286( , ,

-197896

386486, ,Pentium…)

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MIP R4000 ISA * Load/Store * Computation * Jump/Branch * Floating point * Memory management * Special

- 0 31R R

PCHILO

- 32All bit wide

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MIP R4400 Organization

Source : MIP R4000 Microprocessor User’s manual, 2nd edition.

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Computer Architecture

ISA | I/O system Datapath & Control Digital Design Circuit Design

Layout

Application OS

Compiler Firmware

Instruction Set Architecture

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Computer Architecture

ComputerArchitecture

TTTTTTTTTT T TTTTTT T TTT TTTTTTTT

T TTTTTTTTTT

OS Constraints e.g. cost, TTTTTT

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Technology ChangingProcessor

- 30Capacity about % per year- 20Clock rate about % per year

Memory- TTT TTT TTTT60%- 10Speed about % per year- 25Cost per bit about % per year

Disk- 60Capacity about % per year

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Technology

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DRAM TechnologyYear Size1980 64 Kb1983 256 Kb1986 1 Mb1989 4 Mb1992 16 Mb1994 64 Mb1999 256 Mb2002 1 Gb

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Processor Performance

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DSP Processor Improvement

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Course Content Computer Architecture and Engineeri

ng- TTTTTTTTTTT TTT TTTTTT- Computer Org.- Interface - TT TTTTTTTTT- Compiler/System View - TTTTT TTTTTTTTTT

TTTT- BuildingArchitect - Construction

TTTTTTTT

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Summary Knowledge

Computer consist of five components- - -Processor : [1] Datapath, [2] Control- -[3] Memory- - - 4 5[ ] Input devices, [ ] Output devices

Memory Cache : Fast, Expensive

Main Memory : less expensive

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Summary Interface: problem between Compute

r and Outside world. Design : Performance, Power, Area an

d Cost

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Break 5 Minutes Questions & Answers

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Next to

Lecture 2 : Role of Performance & Instruction Set Architecture (ISA)