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2017-10 UNOFFICIAL MEMO Question 1: General Knowledge [30] a) A ____ contains electronics for exchanging data, control, and status signals with an I/O module plus the electronics for controlling the disk read/write mechanism. 1. C drive 2. Command drive 3. Disk drive 4. Processor 5. Cache b) Two addresses are dedicated to keyboard input from a particular terminal. Address 516 refers to the data register and address 517 refers to the ____. 1. memory 2. status register 3. isolated I/O 4. input register 5. output register c) Which one of the following instruction would you use if you want to branch to the label TEST if the sign flag is set? 1. JN TEST 2. JZ TEST 3. JS TEST 4. JNS TEST 5. JNP TEST d) The ____ provides signals that control the operation of the Arithmetic and Logic Unit (ALU) and the movement of the data into and out of the ALU. 1. Data bus 2. Antennae 3. Magnetic drive 4. Temporary memory 5. Processor e) The major functions or requirements for an I/O module fall into the following categories except ____.

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Page 1: gimmenotes.co.za€¦  · Web viewTest whether the number is even or odd. If the number is even, ... mov dx, msg_prpt ; copy contents of msg_prompt to dx. call display. ret. dsp_err:

2017-10 UNOFFICIAL MEMO

Question 1: General Knowledge [30]

a) A ____ contains electronics for exchanging data, control, and status signals with an I/O module plus the electronics for controlling the disk read/write mechanism.1. C drive2. Command drive3. Disk drive4. Processor5. Cache

b) Two addresses are dedicated to keyboard input from a particular terminal. Address 516 refers to the data register and address 517 refers to the ____.1. memory2. status register3. isolated I/O4. input register5. output register

c) Which one of the following instruction would you use if you want to branch to the label TEST if the sign flag is set?1. JN TEST2. JZ TEST3. JS TEST4. JNS TEST5. JNP TEST

d) The ____ provides signals that control the operation of the Arithmetic and Logic Unit (ALU) and the movement of the data into and out of the ALU.1. Data bus2. Antennae3. Magnetic drive4. Temporary memory5. Processor

e) The major functions or requirements for an I/O module fall into the following categories except ____.1. error detection2. processor communication3. device communication4. error control5. data buffering

f) Given A and B as input and F as out function, the algebraic expression XOR is____.1. F = A ⊕ B

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2. F = A – B3. F = A + B4. F = A * B5. F = (A / B)

g) Which of the following are characteristics of Blu-ray DVDs?

a. It can store more than 20 GB per sideb. It has slightly more storage density as normal DVDsc. It uses a short wave-length 405 nm laserd. It uses a red-blue lasere. There are two version available: read-only (BD-ROM) and recordable many (BD-M)

1. only a, b and d2. only a and c3. only a and e4. a, b, c and d5. only b and d

h) Suppose a machine has seven (7) general-purpose 32-bit registers. How many bits must be reserved to the machine code instruction in order to address any of these seven registers?1. 12. 23. 34. 45. 5

i) As one goes down the memory hierarchy, the following occur except ____.1. Decreasing frequency of access of the memory by the processor2. Increasing capacity3. Decreasing access time4. Decreasing cost5. None of the answers given above is correct

j) Which one of the following binary codes have even parity (assume that the left-most bit is the parity bit)?1. 101011102. 101010103. 101001114. 111100015. 00000001

k) Suppose AL contains the value 8Ah. What will be the result of the following instruction?sar al, 31. 11h2. E2h3. 50h

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4. F1h5. None of the above

l) ____ flushes the internal cache memory after writing dirty lines to memory.1. INVD2. WBINVD3. INVLPG4. LDS5. SGDT

m) The ____ module transfers the entire block of data, one word at a time, directly to or from memory.1. Data cache2. DMA3. ROM4. EPROM5. Address register

n) Which of the following is NOT a reason for writing programs in assembly language rather than using a high-level programming language?1. Code is often much faster2. Insight into the problem often allows real improvement in performance3. The program logic is easy to follow4. It allows complete access to hardware5. It can be used to write function libraries that are compatible with multiple operating systems

o) The result of the following hexadecimal addition is ____.ECh + 98h1. 184h2. 24Ah3. 182h4. 1A4h5. None of the above

Question 2 [16]a) Explain four reasons why peripheral devices are not directly connected to the system bus [6]

1. There are a wide variety of peripherals with various methods of operation. It would be impractical to incorporate the necessary logic within the processor to control a range of devices.

2. The data transfer rate of peripherals is often much slower than that of the memory or processor. Thus, it is impractical to use the high-speed system bus to communicate directly with a peripheral.

3. On the other hand, the data transfer rate of some peripherals is faster than that of the memory or processors. Again, the mismatch would lead to inefficiencies if not managed properly.

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4. Peripherals often use different data formats and word lengths than the computer to which they are attached.

b) Discuss five sequences of hardware events that occur when an Input/output (I/O) devices completes an I/O operation [10]1. The device issues an interrupt signal to the processor.2. The processor finishes execution of the current instruction before responding to the

interrupt.3. The processor tests for an interrupt, determines that there is one, and sends an

acknowledgment signal to the device that issued the interrupt. The acknowledgment allows the device to remove its interrupt signal.

4. The processor now needs to prepare to transfer control to the interrupt routine. To begin, it needs to save information needed to resume the current program at the point of interrupt. The minimum information required is (a) the status of the processor, which is contained in a register called the program status word (PSW), and (b) the location of the next instruction to be executed, which is contained in the program counter. These can be pushed onto the system control stack.

5. The processor now loads the program counter with the entry location of the interrupt-handling program that will respond to this interrupt. Depending on the computer architecture and operating system design, there may be a single program; one program for each type of interrupt; or one program for each device and each type of interrupt.

See page 233 for a summary diagram:Hardware:1. Device controller or other system hardware issues an interrupt2. Processor finishes execution of current instruction3. Processor signals acknowledgment of interrupt4. Processor pushes PSW and PC onto control stack5. Processor loads new PC value based on interrupt

Question 3 [10]a) Convert 11 10 and 1310 to binary numbers [4]

1*1 + 1*2 + 0*4 + 1*8 = 11 = 10112

1*1 + 0*2 + 1*4 + 1*8 = 13 = 11012

b) Determine the product of the binary numbers you obtained in (a) [2] 1011* 1101 1011+ 0000+ 1011+ 1011   10001111 = 14310

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c) Compared with the pencil-and-paper approach, explain two ways to make computerised multiplication more efficient [4]

First, we can perform a running addition on the partial products rather than waiting until the end. This eliminates the need for storage of all the partial products; fewer registers are needed.

Second, we can save some time on the generation of partial products. For each 1 on the multiplier, an add and a shift operation are required; but for each 0, only a shift is required.

Question 4 [14]a) Explain the term ‘gate’ in a digital logic circuit [2]

A gate is an electronic circuit that produces an output signal that is a simple Boolean operation on its input signals.

b) Given the following four gates, AND, OR, NOT and NAND , draw the graphical symbol, express the algebraic function and compute the Truth Table for each gate in the table below [12]

Name Graphical Symbol Algebraic Function Truth Table

ANDF = A • B

orF = AB

A B F0 0 00 1 01 0 01 1 1

OR F = A + B

A B F0 0 00 1 11 0 11 1 1

NOTF =or

F = A’

A F0 11 0

NAND F =

A B F0 0 10 1 11 0 11 1 0

Question 5 [15]a) Write a program using two-address machine instructions to execute: [5]

Y= A−BC+(D∗F)

MOVE Y, A Y ← ASUB Y, B Y ← Y-BMOVE T, D T ← D

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MPY T, F T ← T*FADD T, C T ← T+CDIV Y, T Y ← Y/TSee page 410

b) Explain the following stack addressing terms. i. Stack Pointer (SP) [2]

A stack pointer is associated with a stack, which is a reserved block of locations. Its value is the address of the top of the stack.

ii. PUSH [2] Data transfer operation to transfer from source location to the top of the stack.

iii. POP [2] Data transfer operation to transfer from the top of the stack to the destination location.

c) Write short notes on memory management [4] In a uni-programming system, main memory is divided into two parts: one part for the

OS and one part for the program currently being executed.

In a multi-programming system, the “user” part of memory is subdivided to accommodate multiple processes.

The task of subdivision is carried out dynamically by the OS and is known as memory management. Effective memory management is vital in a multiprogramming system.

If only a few processes are in memory, then for much of the time all of the processes will be waiting for I/O and the processor will be idle. Thus, memory needs to be allocated efficiently to pack as many processes into memory as possible.

Question 6 [15]a) List and explain two (2) characteristics of Reduced Instruction Set Architectures (RISC) [6]

One machine instruction per cycleA machine cycle is defined to be the time it takes to fetch two operands from registers, perform an ALU operation, and store the result in a register. Machine instructions can be hardwired, and should execute faster than comparable machine instructions on other machines.

Register-to-register operationsMost operations should be register-to-register, with only simple LOAD and STORE operations accessing memory, thus simplifying the instruction set and the control unit. Such an architecture encourages the optimisation of register use, so that frequently accessed operands remain in high-speed storage.

Simple addressing modes Simple instruction formatsSee page 547

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b) Write an assembly language program to execute the following: [9] Display a user prompt to key in a number < 10.Read a number (<10) from the keyboard.Convert from ASCII to numeric.Display an error message if the number is out of range.Test whether the number is even or odd. If the number is even, display the message ‘Number is even’, otherwise display the message ‘Number is odd’.NB Do not use division by 2.( Hint If the right-most bit of the number is equal to 1, the number is odd.)

bits 16org 100h

jmp main

msg_prpt: db 'Enter a number (1-9): $'msg_err: db 0dh, 0ah, 'Number out of range. $'msg_odd: db 0dh, 0ah, 'Number is odd. $'msg_even: db 0dh, 0ah, 'Number is even. $'num: db 1

display: mov ah, 9h ; "display string" function for int 21h int 21h ret

dsp_prpt: mov dx, msg_prpt ; copy contents of msg_prompt to dx call display ret

dsp_err: mov dx, msg_err ; copy contents of msg_err to dx call display ret

get_num: mov ah, 1h ; "character input" function for int 21h

(stored in al) int 21h mov [num], al ; copy contents of al to space at address [num] ret

validate: mov dl, '0' ; copy character to dl for comparison

cmp [num], dl ; compare to input character jb dsp_err ; display error if < 0 mov dl, '9' cmp [num], dl ja dsp_err ; display error if > 9

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ret

convert: sub al, 30h ; subtract 30h from input to get numeric from ascii ret

odd_even: shr al, 1 ; shifts all bits right 1, lowest bit to carry flag jc dsp_odd ; jump if carry is set (there was a bit in lowest position) mov dx, msg_even call display ret dsp_odd: mov dx, msg_odd call display ret

main: call dsp_prpt call get_num call validate call convert call odd_even int 20h ; Terminate program